From patchwork Wed Aug 8 21:27:57 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 10603 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 48CC223E57 for ; Wed, 8 Aug 2012 21:28:17 +0000 (UTC) Received: from mail-yw0-f52.google.com (mail-yw0-f52.google.com [209.85.213.52]) by fiordland.canonical.com (Postfix) with ESMTP id 062D1A184CA for ; Wed, 8 Aug 2012 21:28:16 +0000 (UTC) Received: by mail-yw0-f52.google.com with SMTP id p61so1326862yhp.11 for ; Wed, 08 Aug 2012 14:28:16 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-provags-id:x-gm-message-state; bh=X0/yiRyRnhRcnsBo7oA20beKzXvNIHR1ZJ5Q01KN6vk=; b=XzHJPuh/j8POs+T+HYUsPK72/WVrDilqxGSkmBRbbB5Fq6ZFfAJLAQYzv5sEQttRLL lcHuNw0ZjN2GIVQwsmf5GeGAXs+16b3e6gKjAIx8o8IDXDGR3UGbDKzdbmxXU/SbB1c7 3QFQJglb0sBjJL9FsZIGZSVUAJOsk8KEAHTxyuzzUbia0xAkFn8tThWJLvF5qCuLw8nP /KBV9hUoesvKccQCIIGHvhVMuCtIkefR2ZhamZcwnd/mJOwl6K/Ug97luUH0t8iVmZIc RyDD2ol1tEb9KEHqqQBkew4438v1kRXUI8Jspa8lsJs00rMnXuO2jKy6GQEjJ7FCcV5p zo5Q== Received: by 10.50.57.168 with SMTP id j8mr358895igq.16.1344461296568; Wed, 08 Aug 2012 14:28:16 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.184.200 with SMTP id ew8csp628838igc; Wed, 8 Aug 2012 14:28:15 -0700 (PDT) Received: by 10.216.138.73 with SMTP id z51mr9947560wei.39.1344461295109; Wed, 08 Aug 2012 14:28:15 -0700 (PDT) Received: from moutng.kundenserver.de (moutng.kundenserver.de. [212.227.17.10]) by mx.google.com with ESMTP id u60si31483857wed.76.2012.08.08.14.28.14; Wed, 08 Aug 2012 14:28:15 -0700 (PDT) Received-SPF: neutral (google.com: 212.227.17.10 is neither permitted nor denied by best guess record for domain of arnd@arndb.de) client-ip=212.227.17.10; Authentication-Results: mx.google.com; spf=neutral (google.com: 212.227.17.10 is neither permitted nor denied by best guess record for domain of arnd@arndb.de) smtp.mail=arnd@arndb.de Received: from localhost.localdomain (HSI-KBW-149-172-5-253.hsi13.kabel-badenwuerttemberg.de [149.172.5.253]) by mrelayeu.kundenserver.de (node=mreu2) with ESMTP (Nemesis) id 0LkUcJ-1TaCNE40uR-00c5yQ; Wed, 08 Aug 2012 23:28:12 +0200 From: Arnd Bergmann To: linux-arm-kernel@lists.infradead.org Cc: arm@kernel.org, linux-kernel@vger.kernel.org, Arnd Bergmann , Russell King Subject: [PATCH 09/10] ARM: rpc: Fix building RiscPC Date: Wed, 8 Aug 2012 23:27:57 +0200 Message-Id: <1344461278-28245-10-git-send-email-arnd@arndb.de> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1344461278-28245-1-git-send-email-arnd@arndb.de> References: <1344461278-28245-1-git-send-email-arnd@arndb.de> X-Provags-ID: V02:K0:NaK+FXj1uuldGtfArWQHyolwDLs+Stbv7HkO30D/9Lh 1W+1qlkMUI1QG0J/ABrUii+HdKick26wZvOe4CmsyHHGVBEfSB kqKyF7SgaueHaD8vr/t4Z97zPwZYFW1m6AXg3vAHk6nXambXI8 n32lsMaCoEO1dvjJz7X8XzVKbuZLBSKhH4HiSm+vFT2FvPnHlz mrnoKjYzdxnC55aG2fJysuQYwKxyyLNB596zaG0z25jcNIbAty jRgk1nV69OC1Z2QIXP75q/mBYi5YC36cqKpAbG0iMzExfnwbbk MYv84hjcdNjQx5CF45VTJvMiPvG+dsbShkfaXxf3LmqPNefNf/ Q+7IerrtAuORNVbXIWTDcnfV5ntEAG5V3nLSboFojdtRcv1v3E Tzn2M4RSt1cMQ== X-Gm-Message-State: ALoCoQlOKGDMtmTKCpMa+WSJ7BFn0a9I7pbcO8hVu2eSqVJ2IrdnoHJGjyDkI6C7C0vPbsK4bsJ1 ARMv3 support was removed in 357c9c1f07 "ARM: Remove support for ARMv3 ARM610 and ARM710 CPUs", which explicitly left parts of the CPU32v3 support in place for building RiscPC. However, this does not actually build in my test setup. This is probably not the right solution, but maybe someone has a better idea for how to deal with this. Without this patch, building rpc_defconfig results in: arch/arm/lib/io-readsw-armv4.S: Assembler messages: arch/arm/lib/io-readsw-armv4.S:23: Error: selected processor does not support ARM mode `ldrh ip,[r0]' arch/arm/lib/io-readsw-armv4.S:25: Error: selected processor does not support ARM mode `strh ip,[r1],#2' arch/arm/lib/io-readsw-armv4.S:38: Error: selected processor does not support ARM mode `ldrh r3,[r0]' make[2]: *** [arch/arm/lib/io-readsw-armv4.o] Error 1 make[1]: *** [arch/arm/lib] Error 2 Signed-off-by: Arnd Bergmann Cc: Russell King --- arch/arm/Kconfig | 2 +- arch/arm/Makefile | 1 - arch/arm/mm/Kconfig | 12 ++---------- 3 files changed, 3 insertions(+), 12 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e91c7cd..1e435185 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -2259,7 +2259,7 @@ config FPE_NWFPE_XP config FPE_FASTFPE bool "FastFPE math emulation (EXPERIMENTAL)" - depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL + depends on (!AEABI || OABI_COMPAT) && EXPERIMENTAL ---help--- Say Y here to include the FAST floating point emulator in the kernel. This is an experimental much faster emulator which now also has full diff --git a/arch/arm/Makefile b/arch/arm/Makefile index b4c2296..2c53344 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -70,7 +70,6 @@ endif arch-$(CONFIG_CPU_32v5) :=-D__LINUX_ARM_ARCH__=5 $(call cc-option,-march=armv5te,-march=armv4t) arch-$(CONFIG_CPU_32v4T) :=-D__LINUX_ARM_ARCH__=4 -march=armv4t arch-$(CONFIG_CPU_32v4) :=-D__LINUX_ARM_ARCH__=4 -march=armv4 -arch-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3 -march=armv3 # This selects how we optimise for the processor. tune-$(CONFIG_CPU_ARM7TDMI) :=-mtune=arm7tdmi diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 101b968..28773e6 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -265,8 +265,7 @@ config CPU_ARM1026 # SA110 config CPU_SA110 bool "Support StrongARM(R) SA-110 processor" if ARCH_RPC - select CPU_32v3 if ARCH_RPC - select CPU_32v4 if !ARCH_RPC + select CPU_32v4 select CPU_ABRT_EV4 select CPU_PABRT_LEGACY select CPU_CACHE_V4WB @@ -395,12 +394,6 @@ config CPU_V7 # Figure out what processor architecture version we should be using. # This defines the compiler instruction set which depends on the machine type. -config CPU_32v3 - bool - select TLS_REG_EMUL if SMP || !MMU - select NEEDS_SYSCALL_FOR_CMPXCHG if SMP - select CPU_USE_DOMAINS if MMU - config CPU_32v4 bool select TLS_REG_EMUL if SMP || !MMU @@ -587,8 +580,7 @@ comment "Processor Features" config ARM_LPAE bool "Support for the Large Physical Address Extension" - depends on MMU && CPU_32v7 && !CPU_32v6 && !CPU_32v5 && \ - !CPU_32v4 && !CPU_32v3 + depends on MMU && CPU_32v7 && !CPU_32v6 && !CPU_32v5 && !CPU_32v4 help Say Y if you have an ARMv7 processor supporting the LPAE page table format and you would like to access memory beyond the