From patchwork Wed Sep 12 14:58:19 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 11362 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 7C99C23E29 for ; Wed, 12 Sep 2012 14:58:50 +0000 (UTC) Received: from mail-ie0-f180.google.com (mail-ie0-f180.google.com [209.85.223.180]) by fiordland.canonical.com (Postfix) with ESMTP id 448A13EFA22B for ; Wed, 12 Sep 2012 14:58:50 +0000 (UTC) Received: by mail-ie0-f180.google.com with SMTP id k11so3001848iea.11 for ; Wed, 12 Sep 2012 07:58:50 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-provags-id:x-gm-message-state; bh=a6iPCynNk7Rr1mqiQkIvA3gfwq+RmnBkQiDNHlpcnIw=; b=StbT0ryth6v7RENTcud2kuG1sPpow5kB3lM2h8/XelU3UV2ON+UfHc2fkzJssOMVj9 8PiwWEp3Hb1f7rpNi0IzZyQn/d+SiPcoMVyGIbq/cx6cdwKClXcZqVo9PgUBh37qd74s vR9F7TirO9My58+sOedn6k5tGJGVMgM6q1aSaa1DwNAzdPu6xkYm5kmDdsjls+mvELrf cpMgBikrQQDujXVSup8IL3771lRZE5SVQTY49heTkJ/p7N1iHqC2zOoFfwHXCObWcHAC iKsPEziKpq36gdgeZi/svBmLi9O+A5hahxyh8B/vKB+o07qLQyktQ5DAzYPK3dDSI7SC Fg1Q== Received: by 10.50.195.134 with SMTP id ie6mr21577860igc.28.1347461930055; Wed, 12 Sep 2012 07:58:50 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.184.232 with SMTP id ex8csp75429igc; Wed, 12 Sep 2012 07:58:49 -0700 (PDT) Received: by 10.205.134.137 with SMTP id ic9mr6250029bkc.57.1347461928546; Wed, 12 Sep 2012 07:58:48 -0700 (PDT) Received: from moutng.kundenserver.de (moutng.kundenserver.de. [212.227.17.9]) by mx.google.com with ESMTP id ht6si12683827bkc.117.2012.09.12.07.58.47; Wed, 12 Sep 2012 07:58:48 -0700 (PDT) Received-SPF: neutral (google.com: 212.227.17.9 is neither permitted nor denied by best guess record for domain of arnd@arndb.de) client-ip=212.227.17.9; Authentication-Results: mx.google.com; spf=neutral (google.com: 212.227.17.9 is neither permitted nor denied by best guess record for domain of arnd@arndb.de) smtp.mail=arnd@arndb.de Received: from klappe2.boeblingen.de.ibm.com (deibp9eh1--blueice3n2.emea.ibm.com [195.212.29.180]) by mrelayeu.kundenserver.de (node=mreu4) with ESMTP (Nemesis) id 0LeFM9-1TsqFk0O1V-00q9Ei; Wed, 12 Sep 2012 16:58:37 +0200 From: Arnd Bergmann To: Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, David Brown , Arnd Bergmann Subject: [PATCH v9 06/13] ARM: SoC: convert MSM SMP to SoC descriptor Date: Wed, 12 Sep 2012 16:58:19 +0200 Message-Id: <1347461906-13527-7-git-send-email-arnd@arndb.de> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1347461906-13527-1-git-send-email-arnd@arndb.de> References: <1347461906-13527-1-git-send-email-arnd@arndb.de> X-Provags-ID: V02:K0:1wgZKARiXtf12+d7Msr+P3Icy6dHGkT20CoeyGlCk59 PLImdv1c9GpAb1fp9IvfblBU9y0sRN0MroWTgXxt+ziKmA6I// kkvzXbwPMMwjmFo2rvV34mo8FO+Ufey6njsHPD9MclFt7AYM0t r7pQbeLG7Em8wee47tmHz1OGdo5oh3fP3fTSAdYE/cQEMdyfV9 0kmenIDKkDCwF0UMg0a6W75xwZeDLHPjmgVZRyRuhqxl7NTi5l Zi8JziBEJQHotAXQeMVlrd9fmP4oRWaDg0tui0H2o8jaBivff1 AGag54Kq1RmRPapQfmezVI2dWwTWGfr/AYIGpA3WnqZs4Hlr+d DteGfxwI0oFmDksWkg+PgSXsAhENGnGxXOIyJ9bNmmCA9616Wn 0aSNWoNKqF0cq5hCB3EH3w9WOQsXqnvKZ8= X-Gm-Message-State: ALoCoQlHBVM93EvTms4szNMRZ2apxmsackleA4Fbt+MQDKhlno+vzkHNvggMvbrBzddgakloZVMp From: Marc Zyngier Convert MSM SMP platforms to use the SoC descriptor to provide their SMP and CPU hotplug operations. Cc: David Brown Signed-off-by: Marc Zyngier Signed-off-by: Arnd Bergmann --- arch/arm/mach-msm/board-msm8960.c | 3 +++ arch/arm/mach-msm/board-msm8x60.c | 7 +++++++ arch/arm/mach-msm/core.h | 2 ++ arch/arm/mach-msm/hotplug.c | 18 +++--------------- arch/arm/mach-msm/platsmp.c | 19 +++++++++++++++---- 5 files changed, 30 insertions(+), 19 deletions(-) create mode 100644 arch/arm/mach-msm/core.h diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c index 65f4a1d..a156968 100644 --- a/arch/arm/mach-msm/board-msm8960.c +++ b/arch/arm/mach-msm/board-msm8960.c @@ -30,6 +30,7 @@ #include #include +#include "core.h" #include "devices.h" static void __init msm8960_fixup(struct tag *tag, char **cmdline, @@ -99,6 +100,7 @@ static void __init msm8960_init_late(void) } MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR") + .smp = smp_ops(msm_smp_ops), .fixup = msm8960_fixup, .reserve = msm8960_reserve, .map_io = msm8960_map_io, @@ -110,6 +112,7 @@ MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR") MACHINE_END MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3") + .smp = smp_ops(msm_smp_ops), .fixup = msm8960_fixup, .reserve = msm8960_reserve, .map_io = msm8960_map_io, diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c index e37a724..dc2abd3 100644 --- a/arch/arm/mach-msm/board-msm8x60.c +++ b/arch/arm/mach-msm/board-msm8x60.c @@ -29,6 +29,8 @@ #include #include +#include "core.h" + static void __init msm8x60_fixup(struct tag *tag, char **cmdline, struct meminfo *mi) { @@ -110,6 +112,7 @@ static const char *msm8x60_fluid_match[] __initdata = { #endif /* CONFIG_OF */ MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3") + .smp = smp_ops(msm_smp_ops), .fixup = msm8x60_fixup, .reserve = msm8x60_reserve, .map_io = msm8x60_map_io, @@ -121,6 +124,7 @@ MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3") MACHINE_END MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF") + .smp = smp_ops(msm_smp_ops), .fixup = msm8x60_fixup, .reserve = msm8x60_reserve, .map_io = msm8x60_map_io, @@ -132,6 +136,7 @@ MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF") MACHINE_END MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR") + .smp = smp_ops(msm_smp_ops), .fixup = msm8x60_fixup, .reserve = msm8x60_reserve, .map_io = msm8x60_map_io, @@ -143,6 +148,7 @@ MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR") MACHINE_END MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA") + .smp = smp_ops(msm_smp_ops), .fixup = msm8x60_fixup, .reserve = msm8x60_reserve, .map_io = msm8x60_map_io, @@ -156,6 +162,7 @@ MACHINE_END #ifdef CONFIG_OF /* TODO: General device tree support for all MSM. */ DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)") + .smp = smp_ops(msm_smp_ops), .map_io = msm8x60_map_io, .init_irq = msm8x60_init_irq, .init_machine = msm8x60_dt_init, diff --git a/arch/arm/mach-msm/core.h b/arch/arm/mach-msm/core.h new file mode 100644 index 0000000..a9bab53 --- /dev/null +++ b/arch/arm/mach-msm/core.h @@ -0,0 +1,2 @@ +extern struct smp_operations msm_smp_ops; +extern void msm_cpu_die(unsigned int cpu); diff --git a/arch/arm/mach-msm/hotplug.c b/arch/arm/mach-msm/hotplug.c index a446fc1..d0f79e8 100644 --- a/arch/arm/mach-msm/hotplug.c +++ b/arch/arm/mach-msm/hotplug.c @@ -13,6 +13,8 @@ #include #include +#include "core.h" + extern volatile int pen_release; static inline void cpu_enter_lowpower(void) @@ -57,17 +59,12 @@ static inline void platform_do_lowpower(unsigned int cpu) } } -int platform_cpu_kill(unsigned int cpu) -{ - return 1; -} - /* * platform-specific code to shutdown a CPU * * Called with IRQs disabled */ -void platform_cpu_die(unsigned int cpu) +void msm_cpu_die(unsigned int cpu) { /* * we're ready for shutdown now, so do it @@ -81,12 +78,3 @@ void platform_cpu_die(unsigned int cpu) */ cpu_leave_lowpower(); } - -int platform_cpu_disable(unsigned int cpu) -{ - /* - * we don't allow CPU 0 to be shutdown (it is still too special - * e.g. clock tick interrupts) - */ - return cpu == 0 ? -EPERM : 0; -} diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c index e012dc8..ba3c4b0 100644 --- a/arch/arm/mach-msm/platsmp.c +++ b/arch/arm/mach-msm/platsmp.c @@ -25,6 +25,7 @@ #include #include "scm-boot.h" +#include "core.h" #define VDD_SC1_ARRAY_CLAMP_GFS_CTL 0x15A0 #define SCSS_CPU1CORE_RESET 0xD80 @@ -48,7 +49,7 @@ static inline int get_core_count(void) return ((read_cpuid_id() >> 4) & 3) + 1; } -void __cpuinit platform_secondary_init(unsigned int cpu) +static void __cpuinit msm_secondary_init(unsigned int cpu) { /* Configure edge-triggered PPIs */ writel(GIC_PPI_EDGE_MASK, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4); @@ -93,7 +94,7 @@ static __cpuinit void prepare_cold_cpu(unsigned int cpu) "address\n"); } -int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) +static int __cpuinit msm_boot_secondary(unsigned int cpu, struct task_struct *idle) { unsigned long timeout; static int cold_boot_done; @@ -153,7 +154,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) * does not support the ARM SCU, so just set the possible cpu mask to * NR_CPUS. */ -void __init smp_init_cpus(void) +static void __init msm_smp_init_cpus(void) { unsigned int i, ncores = get_core_count(); @@ -169,6 +170,16 @@ void __init smp_init_cpus(void) set_smp_cross_call(gic_raise_softirq); } -void __init platform_smp_prepare_cpus(unsigned int max_cpus) +static void __init msm_smp_prepare_cpus(unsigned int max_cpus) { } + +struct smp_operations msm_smp_ops __initdata = { + .smp_init_cpus = msm_smp_init_cpus, + .smp_prepare_cpus = msm_smp_prepare_cpus, + .smp_secondary_init = msm_secondary_init, + .smp_boot_secondary = msm_boot_secondary, +#ifdef CONFIG_HOTPLUG_CPU + .cpu_die = msm_cpu_die, +#endif +};