From patchwork Wed Oct 10 11:42:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 12103 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 5438A1A55A1 for ; Wed, 10 Oct 2012 11:44:38 +0000 (UTC) Received: from mail-ie0-f180.google.com (mail-ie0-f180.google.com [209.85.223.180]) by fiordland.canonical.com (Postfix) with ESMTP id 03087A18372 for ; Wed, 10 Oct 2012 11:44:37 +0000 (UTC) Received: by mail-ie0-f180.google.com with SMTP id e10so637100iej.11 for ; Wed, 10 Oct 2012 04:44:37 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :mime-version:content-type:x-gm-message-state; bh=ZBMOR3mIeL0mGQ2rXR3F5t4WK7Kxpl2VsKqfS1vhb7g=; b=MktkdcxV+ewzkVObmUzeW9eJOG3SIOyAQT4laM8qX4w+vgpBUEXIhiCeMvj6y3CwXY BRVePW6WbOxCfieTLZXqNM9GgKNxNNY/GOr2/ELlrLk14ronAD9mp4Pm6Qc54vwfFEOb BRTat+9mTlcviNCHRW8BU+efihihTXk9cYv26j0pvJUMq6HhKzG4KasiH4vFrbX/33jD 6kNbD3TZDiiMxCNUT/egEU9geMYzYCjpB6d28zmc0SKl+tODODFVf96msaiMJC0s/VWF 17kCldBRde7LICLDoD/wPRExGhlUXdWlS035Q8udqP1s44kaaT/2gi/yJYiy3XHNNV7J +ayA== Received: by 10.50.46.226 with SMTP id y2mr4789421igm.62.1349869477749; Wed, 10 Oct 2012 04:44:37 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp209261igt; Wed, 10 Oct 2012 04:44:36 -0700 (PDT) Received: by 10.152.162.97 with SMTP id xz1mr19570042lab.38.1349869476317; Wed, 10 Oct 2012 04:44:36 -0700 (PDT) Received: from eu1sys200aog109.obsmtp.com (eu1sys200aog109.obsmtp.com [207.126.144.127]) by mx.google.com with SMTP id il9si779136lab.20.2012.10.10.04.43.43 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 10 Oct 2012 04:44:36 -0700 (PDT) Received-SPF: neutral (google.com: 207.126.144.127 is neither permitted nor denied by best guess record for domain of ulf.hansson@stericsson.com) client-ip=207.126.144.127; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.127 is neither permitted nor denied by best guess record for domain of ulf.hansson@stericsson.com) smtp.mail=ulf.hansson@stericsson.com Received: from beta.dmz-us.st.com ([167.4.1.35]) (using TLSv1) by eu1sys200aob109.postini.com ([207.126.147.11]) with SMTP ID DSNKUHVfR4oVxFcjnP2YrxKg7IUWs9ke7Wts@postini.com; Wed, 10 Oct 2012 11:44:35 UTC Received: from zeta.dmz-us.st.com (ns4.st.com [167.4.16.71]) by beta.dmz-us.st.com (STMicroelectronics) with ESMTP id 9291B70; Wed, 10 Oct 2012 11:42:15 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-us.st.com (STMicroelectronics) with ESMTP id 3CF5249; Wed, 10 Oct 2012 07:21:37 +0000 (GMT) Received: from exdcvycastm003.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm003", Issuer "exdcvycastm003" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id BCF2224C07C; Wed, 10 Oct 2012 13:42:39 +0200 (CEST) Received: from steludxu1397.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.1) with Microsoft SMTP Server (TLS) id 8.3.83.0; Wed, 10 Oct 2012 13:42:45 +0200 From: Ulf Hansson To: , Mike Turquette , Mike Turquette , Samuel Ortiz , "Rafael J. Wysocki" Cc: , , Linus Walleij , Lee Jones , Philippe Begnic , Rickard Andersson , Jonas Aberg , Vincent Guittot , Ulf Hansson Subject: [PATCH 4/8] cpufreq: db8500: Fetch cpufreq table from platform data Date: Wed, 10 Oct 2012 13:42:25 +0200 Message-ID: <1349869349-8070-5-git-send-email-ulf.hansson@stericsson.com> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1349869349-8070-1-git-send-email-ulf.hansson@stericsson.com> References: <1349869349-8070-1-git-send-email-ulf.hansson@stericsson.com> MIME-Version: 1.0 X-Gm-Message-State: ALoCoQkmJXV4YcxvzyTWALM9Lundf+DcDjKmu/dNcDgrklYlyEwCpjdaJWyAeosIS0B9g2t7GERq From: Ulf Hansson By fetching the table as platform data we do not need the internally hardcoded cpufreq table anymore. Moreover the corresponding arm_opp idx2opp table, used for mapping frequency to correct opp bits is also removed. This due to that the opp bits is put directly in the index field of the cpufreq table. Signed-off-by: Ulf Hansson Reviewed-by: Linus Walleij Acked-by: Jonas Aaberg Acked-by: Rafael J. Wysocki --- drivers/cpufreq/db8500-cpufreq.c | 67 ++++++++++++++------------------------ 1 file changed, 25 insertions(+), 42 deletions(-) diff --git a/drivers/cpufreq/db8500-cpufreq.c b/drivers/cpufreq/db8500-cpufreq.c index 7d61a6c..dea9a49 100644 --- a/drivers/cpufreq/db8500-cpufreq.c +++ b/drivers/cpufreq/db8500-cpufreq.c @@ -17,36 +17,7 @@ #include #include -static struct cpufreq_frequency_table freq_table[] = { - [0] = { - .index = 0, - .frequency = 200000, - }, - [1] = { - .index = 1, - .frequency = 400000, - }, - [2] = { - .index = 2, - .frequency = 800000, - }, - [3] = { - /* Used for MAX_OPP, if available */ - .index = 3, - .frequency = CPUFREQ_TABLE_END, - }, - [4] = { - .index = 4, - .frequency = CPUFREQ_TABLE_END, - }, -}; - -static enum arm_opp idx2opp[] = { - ARM_EXTCLK, - ARM_50_OPP, - ARM_100_OPP, - ARM_MAX_OPP -}; +static struct cpufreq_frequency_table *freq_table; static struct freq_attr *db8500_cpufreq_attr[] = { &cpufreq_freq_attr_scaling_available_freqs, @@ -88,7 +59,7 @@ static int db8500_cpufreq_target(struct cpufreq_policy *policy, cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); /* request the PRCM unit for opp change */ - if (prcmu_set_arm_opp(idx2opp[idx])) { + if (prcmu_set_arm_opp(freq_table[idx].index)) { pr_err("db8500-cpufreq: Failed to set OPP level\n"); return -EINVAL; } @@ -102,25 +73,30 @@ static int db8500_cpufreq_target(struct cpufreq_policy *policy, static unsigned int db8500_cpufreq_getspeed(unsigned int cpu) { - int i; + int i = 0; /* request the prcm to get the current ARM opp */ - for (i = 0; prcmu_get_arm_opp() != idx2opp[i]; i++) - ; - return freq_table[i].frequency; + int opp = prcmu_get_arm_opp(); + + while (freq_table[i].frequency != CPUFREQ_TABLE_END) { + if (opp == freq_table[i].index) + return freq_table[i].frequency; + i++; + } + + /* We could not find a corresponding opp frequency. */ + return 0; } static int __cpuinit db8500_cpufreq_init(struct cpufreq_policy *policy) { - int i, res; - - BUILD_BUG_ON(ARRAY_SIZE(idx2opp) + 1 != ARRAY_SIZE(freq_table)); - - if (prcmu_has_arm_maxopp()) - freq_table[3].frequency = 1000000; + int i = 0; + int res; pr_info("db8500-cpufreq : Available frequencies:\n"); - for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) + while (freq_table[i].frequency != CPUFREQ_TABLE_END) { pr_info(" %d Mhz\n", freq_table[i].frequency/1000); + i++; + } /* get policy fields based on the table */ res = cpufreq_frequency_table_cpuinfo(policy, freq_table); @@ -163,6 +139,13 @@ static struct cpufreq_driver db8500_cpufreq_driver = { static int db8500_cpufreq_probe(struct platform_device *pdev) { + freq_table = dev_get_platdata(&pdev->dev); + + if (!freq_table) { + pr_err("db8500-cpufreq: Failed to fetch cpufreq table\n"); + return -ENODEV; + } + return cpufreq_register_driver(&db8500_cpufreq_driver); }