From patchwork Sun Feb 3 10:15:48 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 14440 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id DEBB523F94 for ; Sun, 3 Feb 2013 10:18:02 +0000 (UTC) Received: from mail-ve0-f176.google.com (mail-ve0-f176.google.com [209.85.128.176]) by fiordland.canonical.com (Postfix) with ESMTP id 9A555A18412 for ; Sun, 3 Feb 2013 10:18:02 +0000 (UTC) Received: by mail-ve0-f176.google.com with SMTP id cz10so783321veb.21 for ; Sun, 03 Feb 2013 02:18:02 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:x-received:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state; bh=nDBJhNF90M/R2Azg2nMtCe0GN6MHwZN/SolB9d4955c=; b=V9+lazD1fKL5SpThM8aYkR3Y+yOCAZApIdS1cDLyluGs6tHAi8RyrlWrm7P/cFX88J 4Yf6u7xvylEy53EvX0Asv7g+9jWIG0JVlcS0JfP/RRoCIryhD4war7zP/riiCZQ023gy v8hEfHVebXGqI3xzdRCQlgcsaQ23DiBCT5kcdsGgkClR/Ib8J/MMVPxx4T1+Dfj/ycv+ Ga+It0LL+hlakeLVKdUr8t3SJN9DR70g0D5abUG/NX9ccO9WYQ5NqnLT2kwUn09ZeYV7 NhJQWijgm/Wn+WfLZzYbFPPrX3eZrB4ODQpXFXQEMCIYvFIx5fMuP8iNqprhnHx/bygV 9Few== X-Received: by 10.52.21.146 with SMTP id v18mr15158107vde.79.1359886682130; Sun, 03 Feb 2013 02:18:02 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.58.252.8 with SMTP id zo8csp40405vec; Sun, 3 Feb 2013 02:18:01 -0800 (PST) X-Received: by 10.66.84.3 with SMTP id u3mr43030005pay.51.1359886681360; Sun, 03 Feb 2013 02:18:01 -0800 (PST) Received: from mail-pa0-f44.google.com (mail-pa0-f44.google.com [209.85.220.44]) by mx.google.com with ESMTPS id ww9si12790244pbc.339.2013.02.03.02.18.01 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 03 Feb 2013 02:18:01 -0800 (PST) Received-SPF: neutral (google.com: 209.85.220.44 is neither permitted nor denied by best guess record for domain of haojian.zhuang@linaro.org) client-ip=209.85.220.44; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.44 is neither permitted nor denied by best guess record for domain of haojian.zhuang@linaro.org) smtp.mail=haojian.zhuang@linaro.org Received: by mail-pa0-f44.google.com with SMTP id kp1so112493pab.3 for ; Sun, 03 Feb 2013 02:18:01 -0800 (PST) X-Received: by 10.68.130.161 with SMTP id of1mr47079668pbb.32.1359886681009; Sun, 03 Feb 2013 02:18:01 -0800 (PST) Received: from haojian-E6230.domain ([67.198.145.34]) by mx.google.com with ESMTPS id ov4sm14344348pbb.45.2013.02.03.02.17.53 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 03 Feb 2013 02:18:00 -0800 (PST) From: Haojian Zhuang To: linux@arm.linux.org.uk, marek.vasut@gmail.com, robert.jarzmik@free.fr, daniel@caiaq.de, linux-arm-kernel@lists.infradead.org, linus.walleij@linaro.org, grant.likely@secretlab.ca, cxie4@marvell.com, grinberg@compulab.co.il Cc: patches@linaro.org, Haojian Zhuang Subject: [PATCH v2 07/10] gpio: pxa: remove arch related macro Date: Sun, 3 Feb 2013 18:15:48 +0800 Message-Id: <1359886551-20950-8-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1359886551-20950-1-git-send-email-haojian.zhuang@linaro.org> References: <1359886551-20950-1-git-send-email-haojian.zhuang@linaro.org> X-Gm-Message-State: ALoCoQnR/9U0/zq6Sz4tshaQeRgVJdAXzoGaHqsGqvcdsjpClC+RGjHJHAJZIqtRZYMtqrYb7N7Q Remove macro CONFIG_ARCH_PXA. Signed-off-by: Haojian Zhuang Tested-by: Igor Grinberg --- drivers/gpio/gpio-pxa.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c index 95561d6..8130e3b 100644 --- a/drivers/gpio/gpio-pxa.c +++ b/drivers/gpio/gpio-pxa.c @@ -568,21 +568,21 @@ static int pxa_gpio_probe(struct platform_device *pdev) } if (!use_of) { -#ifdef CONFIG_ARCH_PXA - irq = gpio_to_irq(0); - irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, - handle_edge_irq); - set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); - irq_set_chained_handler(IRQ_GPIO0, pxa_gpio_demux_handler); - - irq = gpio_to_irq(1); - irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, - handle_edge_irq); - set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); - irq_set_chained_handler(IRQ_GPIO1, pxa_gpio_demux_handler); -#endif - - for (irq = gpio_to_irq(gpio_offset); + if (irq0 > 0) { + irq = gpio_to_irq(0); + irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, + handle_edge_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + irq_set_chained_handler(irq0, pxa_gpio_demux_handler); + } + if (irq1 > 0) { + irq = gpio_to_irq(1); + irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, + handle_edge_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + irq_set_chained_handler(irq1, pxa_gpio_demux_handler); + } + for (irq = gpio_to_irq(gpio_offset); irq <= gpio_to_irq(pxa_last_gpio); irq++) { irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, handle_edge_irq);