From patchwork Sun Feb 17 11:42:54 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 14937 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id DEE2523E1A for ; Sun, 17 Feb 2013 11:44:48 +0000 (UTC) Received: from mail-ve0-f173.google.com (mail-ve0-f173.google.com [209.85.128.173]) by fiordland.canonical.com (Postfix) with ESMTP id 7DD7EA18521 for ; Sun, 17 Feb 2013 11:44:48 +0000 (UTC) Received: by mail-ve0-f173.google.com with SMTP id oz10so4201046veb.32 for ; Sun, 17 Feb 2013 03:44:48 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:x-received:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state; bh=Swq9+pyMEApqe1fE2vALB5snV2h6LNaeVSkC8kfY3+s=; b=WfDzVtIJDQ16HQq8VaDv2SsgHVSzcgi4Vrmt2EjYjKj1F2aF8wTq/6go4nNpoFqBkO biUngtZoXaBGTr182uDPnef3uA3wY+w1GI/Ri7VVdpTyiEkp3wO4FDBWJ/0nbXNi8X/1 qy/vQn9mt+7hXwrAHdYEapjY3MWza5a7cJ8gbMqTruwY1bZX+zw183iDH8LQ/hN8pT/7 mkxIkAa7B6OwfPle4jgx+PC9gRylUSx3+8hGsBHxZC9ZdIxwMWUbfGtA/YL94iYcEhzd joJa4qwg7pZmT/TEpblA9xFFnQfchJtk0wK8EJsjFcujCdioD0uZ2YQaIAzkIGYu1UoQ 2Guw== X-Received: by 10.52.18.148 with SMTP id w20mr9647991vdd.8.1361101488006; Sun, 17 Feb 2013 03:44:48 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.58.145.101 with SMTP id st5csp43096veb; Sun, 17 Feb 2013 03:44:47 -0800 (PST) X-Received: by 10.68.41.66 with SMTP id d2mr20733440pbl.154.1361101487420; Sun, 17 Feb 2013 03:44:47 -0800 (PST) Received: from mail-pb0-f50.google.com (mail-pb0-f50.google.com [209.85.160.50]) by mx.google.com with ESMTPS id t10si17351546pay.70.2013.02.17.03.44.47 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 17 Feb 2013 03:44:47 -0800 (PST) Received-SPF: neutral (google.com: 209.85.160.50 is neither permitted nor denied by best guess record for domain of haojian.zhuang@linaro.org) client-ip=209.85.160.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.160.50 is neither permitted nor denied by best guess record for domain of haojian.zhuang@linaro.org) smtp.mail=haojian.zhuang@linaro.org Received: by mail-pb0-f50.google.com with SMTP id up1so1228259pbc.37 for ; Sun, 17 Feb 2013 03:44:47 -0800 (PST) X-Received: by 10.66.73.138 with SMTP id l10mr27309364pav.44.1361101487022; Sun, 17 Feb 2013 03:44:47 -0800 (PST) Received: from localhost.localdomain ([67.198.145.34]) by mx.google.com with ESMTPS id hp7sm10927800pbc.8.2013.02.17.03.44.42 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 17 Feb 2013 03:44:46 -0800 (PST) From: Haojian Zhuang To: shiraz.hashim@st.com, shiraz.linux.kernel@gmail.com, linux@arm.linux.org.uk, tony@atomide.com, linux-arm-kernel@lists.infradead.org, swarren@nvidia.com, grant.likely@secretlab.ca, linus.walleij@linaro.org Cc: patches@linaro.org, Haojian Zhuang Subject: [PATCH v9 08/10] pinctrl: single: set function mask as optional Date: Sun, 17 Feb 2013 19:42:54 +0800 Message-Id: <1361101376-3783-9-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1361101376-3783-1-git-send-email-haojian.zhuang@linaro.org> References: <1361101376-3783-1-git-send-email-haojian.zhuang@linaro.org> X-Gm-Message-State: ALoCoQmrHgY3fbE5CObM/DQn6vBNIECuHqcqJdfdPXcRTHQIwIHxzhbgNbSISa/5iD1H+KsPEPoU Since Hisilicon's pin controller is divided into two parts. One is the function mux, and the other is pin configuration. These two parts are in the different memory regions. So make pinctrl-single,function-mask as optional property. Then we can define pingroups without valid function mux that is only used for pin configuration. Signed-off-by: Haojian Zhuang Acked-by: Tony Lindgren --- drivers/pinctrl/pinctrl-single.c | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index 8b9dd95..fe8f321 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -350,6 +350,9 @@ static int pcs_enable(struct pinctrl_dev *pctldev, unsigned fselector, int i; pcs = pinctrl_dev_get_drvdata(pctldev); + /* If function mask is null, needn't enable it. */ + if (!pcs->fmask) + return 0; func = radix_tree_lookup(&pcs->ftree, fselector); if (!func) return -EINVAL; @@ -384,6 +387,10 @@ static void pcs_disable(struct pinctrl_dev *pctldev, unsigned fselector, int i; pcs = pinctrl_dev_get_drvdata(pctldev); + /* If function mask is null, needn't disable it. */ + if (!pcs->fmask) + return; + func = radix_tree_lookup(&pcs->ftree, fselector); if (!func) { dev_err(pcs->dev, "%s could not find function%i\n", @@ -427,6 +434,10 @@ static int pcs_request_gpio(struct pinctrl_dev *pctldev, int mux_bytes = 0; unsigned data; + /* If function mask is null, return directly. */ + if (!pcs->fmask) + return -ENOTSUPP; + list_for_each_safe(pos, tmp, &pcs->gpiofuncs) { frange = list_entry(pos, struct pcs_gpiofunc_range, node); if (pin >= frange->offset + frange->npins @@ -969,10 +980,17 @@ static int pcs_probe(struct platform_device *pdev) PCS_GET_PROP_U32("pinctrl-single,register-width", &pcs->width, "register width not specified\n"); - PCS_GET_PROP_U32("pinctrl-single,function-mask", &pcs->fmask, - "function register mask not specified\n"); - pcs->fshift = ffs(pcs->fmask) - 1; - pcs->fmax = pcs->fmask >> pcs->fshift; + ret = of_property_read_u32(np, "pinctrl-single,function-mask", + &pcs->fmask); + if (!ret) { + pcs->fshift = ffs(pcs->fmask) - 1; + pcs->fmax = pcs->fmask >> pcs->fshift; + } else { + /* If mask property doesn't exist, function mux is invalid. */ + pcs->fmask = 0; + pcs->fshift = 0; + pcs->fmax = 0; + } ret = of_property_read_u32(np, "pinctrl-single,function-off", &pcs->foff);