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[86.16.136.251]) by mx.google.com with ESMTPS id n2sm18968272wiy.6.2013.04.02.06.22.06 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 02 Apr 2013 06:22:07 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: arnd@arndb.de, linus.walleij@stericsson.com, Lee Jones Subject: [PATCH 2/9] ARM: ux500: Remove incorrect DB9540 PRCMU TCDM base location Date: Tue, 2 Apr 2013 14:21:49 +0100 Message-Id: <1364908916-29803-2-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1364908916-29803-1-git-send-email-lee.jones@linaro.org> References: <1364908916-29803-1-git-send-email-lee.jones@linaro.org> X-Gm-Message-State: ALoCoQkVYfnFhQocFLhtO6pRoNSs2RkMrQ+Q5+N2eQ54JniIYXTO31qOhR01rnjDc2Xw2wHJiAtB X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.182 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The Tightly Coupled Data Memory for the DB9540 is actually in the same place as the DB8500's. This definition is just plain wrong. Signed-off-by: Lee Jones --- arch/arm/mach-ux500/include/mach/db8500-regs.h | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-ux500/include/mach/db8500-regs.h b/arch/arm/mach-ux500/include/mach/db8500-regs.h index 1530d49..856e584 100644 --- a/arch/arm/mach-ux500/include/mach/db8500-regs.h +++ b/arch/arm/mach-ux500/include/mach/db8500-regs.h @@ -102,7 +102,6 @@ #define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000) #define U9540_DMC1_BASE (U8500_PER4_BASE + 0x0A000) #define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x68000) -#define U9540_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x6A000) #define U8500_PRCMU_TCPM_BASE (U8500_PER4_BASE + 0x60000) #define U8500_PRCMU_TIMER_3_BASE (U8500_PER4_BASE + 0x07338) #define U8500_PRCMU_TIMER_4_BASE (U8500_PER4_BASE + 0x07450)