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[86.16.136.251]) by mx.google.com with ESMTPS id g9sm30684863wix.1.2013.04.09.11.39.52 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 09 Apr 2013 11:39:53 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: arnd@arndb.de, linus.walleij@stericsson.com, Lee Jones Subject: [PATCH 3/8] dmaengine: ste_dma40: Actually write the runtime configuration to registers Date: Tue, 9 Apr 2013 19:39:38 +0100 Message-Id: <1365532783-27425-3-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1365532783-27425-1-git-send-email-lee.jones@linaro.org> References: <1365532783-27425-1-git-send-email-lee.jones@linaro.org> X-Gm-Message-State: ALoCoQkmVS99dUGyM90Ua8EW/GXsyhaTW+Jrqh8HLucqaA8XeRGc6G5j4EK7MbS0ozQXOR+JTSER X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.180 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Someone has spent a fair amount of effort writing a runtime configuration changing algorithm for DMA clients. However, the config appears to never actually make it to hardware. In order for the configuration to take hold we need to issue a d40_config_write(), as this is the routine which writes it into the hardware's registers. Signed-off-by: Lee Jones --- drivers/dma/ste_dma40.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index 3b83dee..2a0a9d4 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -2831,6 +2831,9 @@ static int d40_set_runtime_config(struct dma_chan *chan, /* These settings will take precedence later */ d40c->runtime_addr = config_addr; d40c->runtime_direction = config->direction; + + d40_config_write(d40c); + dev_dbg(d40c->base->dev, "configured channel %s for %s, data width %d/%d, " "maxburst %d/%d elements, LE, no flow control\n",