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[86.16.136.251]) by mx.google.com with ESMTPS id t7sm30483773wij.2.2013.04.18.03.13.04 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 18 Apr 2013 03:13:05 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: arnd@arndb.de, linus.walleij@stericsson.com, Lee Jones , Vinod Koul , Dan Williams , Per Forlin , Rabin Vincent Subject: [PATCH 19/32] dmaengine: ste_dma40: Move more setup into the configuration routines Date: Thu, 18 Apr 2013 11:12:01 +0100 Message-Id: <1366279934-30761-20-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1366279934-30761-1-git-send-email-lee.jones@linaro.org> References: <1366279934-30761-1-git-send-email-lee.jones@linaro.org> X-Gm-Message-State: ALoCoQlnRPfXUX9a/EPBT+DaI2+BdWWXvAUwUVQF+3tad9Kw8HKrkTz78JErwtpaulRoC7ZO1szQ X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c02::22d is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The less configuration we can do during the allocation of a channel the better. As this will mean the likelihood of requiring extra information which isn't normally passed through the dma_request_channel() is lessened. Cc: Vinod Koul Cc: Dan Williams Cc: Per Forlin Cc: Rabin Vincent Signed-off-by: Lee Jones --- drivers/dma/ste_dma40.c | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index 04cc75f..28fe153 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -2440,16 +2440,6 @@ static int d40_alloc_chan_resources(struct dma_chan *chan) d40_set_prio_realtime(d40c); - if (chan_is_logical(d40c)) { - if (d40c->dma_cfg.dir == STEDMA40_PERIPH_TO_MEM) - d40c->lcpa = d40c->base->lcpa_base + - d40c->dma_cfg.src_dev_type * D40_LCPA_CHAN_SIZE; - else - d40c->lcpa = d40c->base->lcpa_base + - d40c->dma_cfg.dst_dev_type * - D40_LCPA_CHAN_SIZE + D40_LCPA_CHAN_DST_DELTA; - } - if (chan_is_logical(d40c)) d40_log_gim_unmask(&d40c->src_def_cfg, &d40c->dst_def_cfg); @@ -2793,9 +2783,17 @@ static int d40_set_runtime_config(struct dma_chan *chan, return ret; /* Fill in register values */ - if (chan_is_logical(d40c)) + if (chan_is_logical(d40c)) { + if (d40c->dma_cfg.dir == STEDMA40_PERIPH_TO_MEM) + d40c->lcpa = d40c->base->lcpa_base + + d40c->dma_cfg.dev_type * D40_LCPA_CHAN_SIZE; + else + d40c->lcpa = d40c->base->lcpa_base + + d40c->dma_cfg.dev_type * + D40_LCPA_CHAN_SIZE + D40_LCPA_CHAN_DST_DELTA; + d40_log_cfg(cfg, &d40c->log_def.lcsp1, &d40c->log_def.lcsp3); - else + } else d40_phy_cfg(cfg, &d40c->src_def_cfg, &d40c->dst_def_cfg); /* These settings will take precedence later */