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[86.16.136.251]) by mx.google.com with ESMTPSA id o3sm17516019wia.2.2013.05.03.07.33.51 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 03 May 2013 07:33:53 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: arnd@arndb.de, linus.walleij@stericsson.com, srinidhi.kasagar@stericsson.com, Lee Jones Subject: [PATCH 15/63] ARM: ux500: Remove unused 'data_width' attributes from UART DMA configs Date: Fri, 3 May 2013 15:32:01 +0100 Message-Id: <1367591569-32197-16-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1367591569-32197-1-git-send-email-lee.jones@linaro.org> References: <1367591569-32197-1-git-send-email-lee.jones@linaro.org> X-Gm-Message-State: ALoCoQm3qy2ZLAV34BH4bv+ikCukVRbH+GIHWFmvOSbR1dB0pyoJenb6WTWQoHBwLDVqqIvv8bvY X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.175 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , DMA configuration data is now allocated in the UART driver, so these are just ignored. Reviewed-by: Linus Walleij Signed-off-by: Lee Jones --- arch/arm/mach-ux500/board-mop500.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index 35fd82f..883dc66 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c @@ -530,48 +530,36 @@ static struct stedma40_chan_cfg uart0_dma_cfg_rx = { .mode = STEDMA40_MODE_LOGICAL, .dir = STEDMA40_PERIPH_TO_MEM, .dev_type = DB8500_DMA_DEV13_UART0, - .src_info.data_width = STEDMA40_BYTE_WIDTH, - .dst_info.data_width = STEDMA40_BYTE_WIDTH, }; static struct stedma40_chan_cfg uart0_dma_cfg_tx = { .mode = STEDMA40_MODE_LOGICAL, .dir = STEDMA40_MEM_TO_PERIPH, .dev_type = DB8500_DMA_DEV13_UART0, - .src_info.data_width = STEDMA40_BYTE_WIDTH, - .dst_info.data_width = STEDMA40_BYTE_WIDTH, }; static struct stedma40_chan_cfg uart1_dma_cfg_rx = { .mode = STEDMA40_MODE_LOGICAL, .dir = STEDMA40_PERIPH_TO_MEM, .dev_type = DB8500_DMA_DEV12_UART1, - .src_info.data_width = STEDMA40_BYTE_WIDTH, - .dst_info.data_width = STEDMA40_BYTE_WIDTH, }; static struct stedma40_chan_cfg uart1_dma_cfg_tx = { .mode = STEDMA40_MODE_LOGICAL, .dir = STEDMA40_MEM_TO_PERIPH, .dev_type = DB8500_DMA_DEV12_UART1, - .src_info.data_width = STEDMA40_BYTE_WIDTH, - .dst_info.data_width = STEDMA40_BYTE_WIDTH, }; static struct stedma40_chan_cfg uart2_dma_cfg_rx = { .mode = STEDMA40_MODE_LOGICAL, .dir = STEDMA40_PERIPH_TO_MEM, .dev_type = DB8500_DMA_DEV11_UART2, - .src_info.data_width = STEDMA40_BYTE_WIDTH, - .dst_info.data_width = STEDMA40_BYTE_WIDTH, }; static struct stedma40_chan_cfg uart2_dma_cfg_tx = { .mode = STEDMA40_MODE_LOGICAL, .dir = STEDMA40_MEM_TO_PERIPH, .dev_type = DB8500_DMA_DEV11_UART2, - .src_info.data_width = STEDMA40_BYTE_WIDTH, - .dst_info.data_width = STEDMA40_BYTE_WIDTH, }; #endif