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[86.16.136.251]) by mx.google.com with ESMTPSA id h8sm7063221wiz.9.2013.05.08.06.30.05 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 08 May 2013 06:30:06 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: arnd@arndb.de, linus.walleij@stericsson.com, srinidhi.kasagar@stericsson.com, Lee Jones , Ulf Hansson , Mike Turquette Subject: [PATCH 3/9] clk: ux500: Provide device enumeration number suffix for SMSC911x Date: Wed, 8 May 2013 14:29:03 +0100 Message-Id: <1368019749-19455-4-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1368019749-19455-1-git-send-email-lee.jones@linaro.org> References: <1368019749-19455-1-git-send-email-lee.jones@linaro.org> X-Gm-Message-State: ALoCoQk3XBpR8FP13Mjhpqd6OZp3gST9HS/jUygbUj3lIo65XUSAtv1xi2xOpVsuLFZAWAAEU86s X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.174 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , First Ethernet device has a ".0" appended onto the device name. It appears that we need this in order to obtain the correct clock. Cc: Ulf Hansson Cc: Mike Turquette Signed-off-by: Lee Jones --- drivers/clk/ux500/u8500_clk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c index 0b4f35a..80069c3 100644 --- a/drivers/clk/ux500/u8500_clk.c +++ b/drivers/clk/ux500/u8500_clk.c @@ -325,7 +325,7 @@ void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", clkrst3_base, BIT(0), 0); clk_register_clkdev(clk, "fsmc", NULL); - clk_register_clkdev(clk, NULL, "smsc911x"); + clk_register_clkdev(clk, NULL, "smsc911x.0"); clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", clkrst3_base, BIT(1), 0);