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[86.16.136.251]) by mx.google.com with ESMTPSA id q13sm2898210wie.8.2013.05.15.02.52.12 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 15 May 2013 02:52:13 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, balbi@ti.com, linux-usb@vger.kernel.org, linux-crypto@vger.kernel.org, davem@davemloft.net, herbert@gondor.apana.org.au, vinod.koul@intel.com Cc: arnd@arndb.de, linus.walleij@stericsson.com, srinidhi.kasagar@stericsson.com, Lee Jones , Dan Williams , Per Forlin , Rabin Vincent Subject: [PATCH 01/39] dmaengine: ste_dma40: Separate Logical Global Interrupt Mask (GIM) unmasking Date: Wed, 15 May 2013 10:51:24 +0100 Message-Id: <1368611522-9984-2-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1368611522-9984-1-git-send-email-lee.jones@linaro.org> References: <1368611522-9984-1-git-send-email-lee.jones@linaro.org> X-Gm-Message-State: ALoCoQnPlXkiF36wX3KdhKlCgXcIH+FCpxUQrZj8gn3/6+SfYs9kxkjQzTGFDZZwmoy9iZXGpOK/ X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c01::22f is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , During the initial setup of a logical channel, it is necessary to unmask the GIM in order to receive generated terminal count and error interrupts. We're separating out this required code so it will be possible to move the remaining code in d40_phy_cfg(), which is mostly runtime configuration into the runtime_config() routine. Cc: Vinod Koul Cc: Dan Williams Cc: Per Forlin Cc: Rabin Vincent Acked-by: Arnd Bergmann Signed-off-by: Lee Jones --- drivers/dma/ste_dma40.c | 4 ++++ drivers/dma/ste_dma40_ll.c | 5 ----- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index 5e9f6d6..759293e 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -2513,6 +2513,10 @@ static int d40_alloc_chan_resources(struct dma_chan *chan) d40c->lcpa = d40c->base->lcpa_base + d40c->dma_cfg.dev_type * D40_LCPA_CHAN_SIZE + D40_LCPA_CHAN_DST_DELTA; + + /* Unmask the Global Interrupt Mask. */ + d40c->src_def_cfg |= BIT(D40_SREG_CFG_LOG_GIM_POS); + d40c->dst_def_cfg |= BIT(D40_SREG_CFG_LOG_GIM_POS); } dev_dbg(chan2dev(d40c), "allocated %s channel (phy %d%s)\n", diff --git a/drivers/dma/ste_dma40_ll.c b/drivers/dma/ste_dma40_ll.c index 5eb6c10..435a223 100644 --- a/drivers/dma/ste_dma40_ll.c +++ b/drivers/dma/ste_dma40_ll.c @@ -107,11 +107,6 @@ void d40_phy_cfg(struct stedma40_chan_cfg *cfg, src |= 1 << D40_SREG_CFG_PRI_POS; dst |= 1 << D40_SREG_CFG_PRI_POS; } - - } else { - /* Logical channel */ - dst |= 1 << D40_SREG_CFG_LOG_GIM_POS; - src |= 1 << D40_SREG_CFG_LOG_GIM_POS; } if (cfg->src_info.big_endian)