From patchwork Tue Nov 12 13:48:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 21457 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-gg0-f199.google.com (mail-gg0-f199.google.com [209.85.161.199]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id AE89023FBE for ; Tue, 12 Nov 2013 13:48:11 +0000 (UTC) Received: by mail-gg0-f199.google.com with SMTP id e27sf8803164gga.2 for ; Tue, 12 Nov 2013 05:48:11 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=fUGApTp+GQAAO94yDoQEPDfOtan6RSper2Cdy1UkS8w=; b=i0w2IYtlMPDuTcG1XMagwjAgGp4nCsSY5c+EvUzTfhxOFla6GozOCCkdtZB6UXJ5mo C0vkdvhoSiuMR2c7cY4Ns/I1MK0UHqolfSZxyjWuMflvCnXrvzZyKurlc9u9SCT6hdCM 8vSFXmY86Vbqj16O4b78AKAc37pssdqSvod84SOnfPbYNRQFLG+LRRyl7hONjTZzamaY pHyPVBRtdZLksh8wbWv5WOUYxqPJtJ62PLdRbs9Zkfq+j8UzMYfOU1UIEqdRmgPsF+30 UsnSkmCkRwDWwvy+lfPh0MSop5R3QBY77sQ/0s4SK5eHxlutS0K8Z9GM/C8ZpfUtWM9u /j+A== X-Gm-Message-State: ALoCoQkR3zCa03Nmx8RZWk9312TrDF5JqCPMo9kPt8nmCEL9+/w0WTh923Dnl0k1OSbBg/ei2U74 X-Received: by 10.236.163.67 with SMTP id z43mr3009049yhk.27.1384264091328; Tue, 12 Nov 2013 05:48:11 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.13.9 with SMTP id d9ls104750qec.26.gmail; Tue, 12 Nov 2013 05:48:11 -0800 (PST) X-Received: by 10.220.147.20 with SMTP id j20mr9392970vcv.21.1384264091216; Tue, 12 Nov 2013 05:48:11 -0800 (PST) Received: from mail-ve0-f172.google.com (mail-ve0-f172.google.com [209.85.128.172]) by mx.google.com with ESMTPS id sz7si12043578vdc.47.2013.11.12.05.48.11 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 12 Nov 2013 05:48:11 -0800 (PST) Received-SPF: neutral (google.com: 209.85.128.172 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.172; Received: by mail-ve0-f172.google.com with SMTP id oz11so3228883veb.3 for ; Tue, 12 Nov 2013 05:48:11 -0800 (PST) X-Received: by 10.52.35.136 with SMTP id h8mr24020498vdj.6.1384264091099; Tue, 12 Nov 2013 05:48:11 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp163906vcz; Tue, 12 Nov 2013 05:48:10 -0800 (PST) X-Received: by 10.180.10.130 with SMTP id i2mr16360645wib.15.1384264090122; Tue, 12 Nov 2013 05:48:10 -0800 (PST) Received: from mail-wg0-f49.google.com (mail-wg0-f49.google.com [74.125.82.49]) by mx.google.com with ESMTPS id l11si11695783wjw.16.2013.11.12.05.48.09 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 12 Nov 2013 05:48:10 -0800 (PST) Received-SPF: neutral (google.com: 74.125.82.49 is neither permitted nor denied by best guess record for domain of linus.walleij@linaro.org) client-ip=74.125.82.49; Received: by mail-wg0-f49.google.com with SMTP id x13so2098341wgg.16 for ; Tue, 12 Nov 2013 05:48:09 -0800 (PST) X-Received: by 10.180.211.71 with SMTP id na7mr16637374wic.5.1384264089403; Tue, 12 Nov 2013 05:48:09 -0800 (PST) Received: from localhost.localdomain ([85.235.11.236]) by mx.google.com with ESMTPSA id mw9sm45662018wib.0.2013.11.12.05.48.07 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 12 Nov 2013 05:48:08 -0800 (PST) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, Russell King Cc: Andrea Adami , Dmitry Eremin-Solenikov , Dmitry Artamonow , Dmitry Eremin-Solenikov , Linus Walleij Subject: [PATCH 2/7] ARM: sa1100: use an irqdomain for the high GPIO IRQs Date: Tue, 12 Nov 2013 14:48:05 +0100 Message-Id: <1384264085-6249-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.8.3.1 X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: linus.walleij@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.172 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This moves the remaining high GPIO IRQs over to be mapped using a legacy IRQ domain. Signed-off-by: Linus Walleij --- arch/arm/mach-sa1100/irq.c | 47 +++++++++++++++++++++++++++++++--------------- 1 file changed, 32 insertions(+), 15 deletions(-) diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c index 15fd8a580391..ac032c84763c 100644 --- a/arch/arm/mach-sa1100/irq.c +++ b/arch/arm/mach-sa1100/irq.c @@ -170,15 +170,6 @@ static int sa1100_high_gpio_wake(struct irq_data *d, unsigned int on) return 0; } -static struct irq_chip sa1100_high_gpio_chip = { - .name = "GPIO-h", - .irq_ack = sa1100_high_gpio_ack, - .irq_mask = sa1100_high_gpio_mask, - .irq_unmask = sa1100_high_gpio_unmask, - .irq_set_type = sa1100_gpio_type, - .irq_set_wake = sa1100_high_gpio_wake, -}; - /* * We don't need to ACK IRQs on the SA1100 unless they're GPIOs * this is for internal IRQs i.e. from 11 to 31. @@ -213,11 +204,16 @@ static int sa1100_set_wake(struct irq_data *d, unsigned int on) * @domain: irqdomain used to map the irqs for these chips * @low_gpio_chip: irqchip to handle hardware IRQs 0-10 * @normal_chip: irqchip to handle hardware IRQs 12-31 + * @high_domain: irqdomain for the high GPIO IRQs + * @high_gpio_chip: irqchip handling the cascaded IRQs off + * IRQ 11 on the normal chip. */ struct sa1100_sc { struct irq_domain *domain; struct irq_chip low_gpio_chip; struct irq_chip normal_chip; + struct irq_domain *high_domain; + struct irq_chip high_gpio_chip; }; static struct sa1100_sc sa1100_sc = { @@ -236,6 +232,14 @@ static struct sa1100_sc sa1100_sc = { .irq_unmask = sa1100_unmask_irq, .irq_set_wake = sa1100_set_wake, }, + .high_gpio_chip = { + .name = "GPIO-h", + .irq_ack = sa1100_high_gpio_ack, + .irq_mask = sa1100_high_gpio_mask, + .irq_unmask = sa1100_high_gpio_unmask, + .irq_set_type = sa1100_gpio_type, + .irq_set_wake = sa1100_high_gpio_wake, + }, }; asmlinkage void __exception_irq_entry sa1100_handle_irq(struct pt_regs *regs) @@ -266,6 +270,7 @@ static int sa1100_sc_irqdomain_map(struct irq_domain *d, unsigned int irq, if (hwirq >= 12 && hwirq <= 31) irq_set_chip_and_handler(irq, &sc->normal_chip, handle_level_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); return 0; } @@ -275,6 +280,22 @@ static struct irq_domain_ops sa1100_sc_irqdomain_ops = { .xlate = irq_domain_xlate_onetwocell, }; +static int sa1100_sc_high_irqdomain_map(struct irq_domain *d, unsigned int irq, + irq_hw_number_t hwirq) +{ + struct sa1100_sc *sc = d->host_data; + + irq_set_chip_data(irq, sc); + irq_set_chip_and_handler(irq, &sc->high_gpio_chip, + handle_edge_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + return 0; +} + +static struct irq_domain_ops sa1100_sc_high_irqdomain_ops = { + .map = sa1100_sc_high_irqdomain_map, + .xlate = irq_domain_xlate_onetwocell, +}; static struct resource irq_resource = DEFINE_RES_MEM_NAMED(0x90050000, SZ_64K, "irqs"); @@ -346,7 +367,6 @@ device_initcall(sa1100irq_init_devicefs); void __init sa1100_init_irq(void) { - unsigned int irq; struct sa1100_sc *sc = &sa1100_sc; request_resource(&iomem_resource, &irq_resource); @@ -371,10 +391,7 @@ void __init sa1100_init_irq(void) /* Register IRQs 0-31 using a legacy irqdomain */ sc->domain = irq_domain_add_legacy(NULL, 32, 0, 0, &sa1100_sc_irqdomain_ops, sc); - for (irq = 32; irq <= 48; irq++) { - irq_set_chip_and_handler(irq, &sa1100_high_gpio_chip, - handle_edge_irq); - set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); - } + sc->high_domain = irq_domain_add_legacy(NULL, 17, 32, 0, + &sa1100_sc_high_irqdomain_ops, sc); sa1100_init_gpio(); }