From patchwork Thu Nov 14 14:22:29 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 21500 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-pb0-f72.google.com (mail-pb0-f72.google.com [209.85.160.72]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 30E7A23FDD for ; Thu, 14 Nov 2013 14:23:01 +0000 (UTC) Received: by mail-pb0-f72.google.com with SMTP id jt11sf1512920pbb.3 for ; Thu, 14 Nov 2013 06:23:00 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=tj9tUfmbrL1gjQxlgJMadsdP8G9NFdCwPI/HyRyCEOI=; b=d3GljMWhlh9xIU7EChqp/Jefx218X6fYiWEcadYL7LnpqDvKgu+NvnjdYcGOlOvIVx oRXuKA6WU8AMDDo/Jiu42ry9cjDNWm9JSi2dzgX+5l/k1+bgfcG8rgO/Dd7lda+/JkqV epkHeUplzYDAV72TeC0XJSPn9/r1cLRAEg0wWwL05P9ns8KBML1xheRbAE1zpP6OvzLe uGX8zN3sRXw0jZ0lvEh2KSxM5iV7LGEb+Lju0JGQXlGUx3aio8twpTUqWYEorMoaxaYm X5pA26kWmalnHWgllkbcsutqtr7DnEskJvF1G7o8q6STTkn4xBWE1ger5TdO0CFZEcc7 pa/g== X-Gm-Message-State: ALoCoQkpd3zAWVs8WeuKXTvo61dKMA2yttsKGLoZxFZn5/9kIeTTycU+Mb1DXeEaLWhWDgQUgZDC X-Received: by 10.68.234.165 with SMTP id uf5mr682590pbc.0.1384438980255; Thu, 14 Nov 2013 06:23:00 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.12.231 with SMTP id b7ls959146qec.55.gmail; Thu, 14 Nov 2013 06:23:00 -0800 (PST) X-Received: by 10.220.183.199 with SMTP id ch7mr927209vcb.27.1384438980135; Thu, 14 Nov 2013 06:23:00 -0800 (PST) Received: from mail-ve0-f177.google.com (mail-ve0-f177.google.com [209.85.128.177]) by mx.google.com with ESMTPS id uy8si17164972vcb.130.2013.11.14.06.23.00 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 14 Nov 2013 06:23:00 -0800 (PST) Received-SPF: neutral (google.com: 209.85.128.177 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.177; Received: by mail-ve0-f177.google.com with SMTP id jz11so1873240veb.22 for ; Thu, 14 Nov 2013 06:23:00 -0800 (PST) X-Received: by 10.220.11.7 with SMTP id r7mr999179vcr.12.1384438980041; Thu, 14 Nov 2013 06:23:00 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp319805vcz; Thu, 14 Nov 2013 06:22:59 -0800 (PST) X-Received: by 10.182.76.98 with SMTP id j2mr620594obw.106.1384438978436; Thu, 14 Nov 2013 06:22:58 -0800 (PST) Received: from mail-oa0-f44.google.com (mail-oa0-f44.google.com [209.85.219.44]) by mx.google.com with ESMTPS id h5si30464609oed.40.2013.11.14.06.22.58 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 14 Nov 2013 06:22:58 -0800 (PST) Received-SPF: neutral (google.com: 209.85.219.44 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) client-ip=209.85.219.44; Received: by mail-oa0-f44.google.com with SMTP id l6so2320370oag.3 for ; Thu, 14 Nov 2013 06:22:58 -0800 (PST) X-Received: by 10.182.246.98 with SMTP id xv2mr1435383obc.92.1384438978069; Thu, 14 Nov 2013 06:22:58 -0800 (PST) Received: from localhost.localdomain (cpc15-aztw25-2-0-cust493.aztw.cable.virginm.net. [92.233.57.238]) by mx.google.com with ESMTPSA id z5sm5585965obg.13.2013.11.14.06.22.56 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 14 Nov 2013 06:22:57 -0800 (PST) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: linus.walleij@linaro.org, dwmw2@infradead.org, linux-mtd@lists.infradead.org, angus.clark@st.com, Lee Jones Subject: [PATCH 03/10] mtd: st_spi_fsm: Initialise and configure the FSM for normal working conditions Date: Thu, 14 Nov 2013 14:22:29 +0000 Message-Id: <1384438956-31153-4-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1384438956-31153-1-git-send-email-lee.jones@linaro.org> References: <1384438956-31153-1-git-send-email-lee.jones@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.177 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This patch uses default values to initialise a connected flash chip. This includes; a device soft reset, setting of a safe working frequency, a switch into Fast Sequencing Mode, configuring of timing data and a purge of the FIFO. Signed-off-by: Lee Jones --- drivers/mtd/devices/st_spi_fsm.c | 123 +++++++++++++++++++++++++++++++++++++++ drivers/mtd/devices/st_spi_fsm.h | 4 ++ 2 files changed, 127 insertions(+) diff --git a/drivers/mtd/devices/st_spi_fsm.c b/drivers/mtd/devices/st_spi_fsm.c index 689f059..f560343 100644 --- a/drivers/mtd/devices/st_spi_fsm.c +++ b/drivers/mtd/devices/st_spi_fsm.c @@ -25,19 +25,136 @@ #include "st_spi_fsm.h" +#define STFSM_DEFAULT_EMI_FREQ 100000000UL /* 100 MHz */ +#define STFSM_DEFAULT_WR_TIME STFSM_DEFAULT_EMI_FREQ * (15/1000) /* 15ms */ + +#define FLASH_SAFE_FREQ 10000000UL /* 10 MHz */ + struct stfsm { struct device *dev; void __iomem *base; struct resource *region; struct mtd_info mtd; struct mutex lock; + + uint32_t fifo_dir_delay; }; +static inline uint32_t stfsm_fifo_available(struct stfsm *fsm) +{ + return (readl(fsm->base + SPI_FAST_SEQ_STA) >> 5) & 0x7f; +} + +static void stfsm_clear_fifo(struct stfsm *fsm) +{ + uint32_t avail; + + for (;;) { + avail = stfsm_fifo_available(fsm); + if (!avail) + break; + + while (avail) { + readl(fsm->base + SPI_FAST_SEQ_DATA_REG); + avail--; + } + } +} + +static int stfsm_set_mode(struct stfsm *fsm, uint32_t mode) +{ + int ret, timeout = 10; + + /* Wait for controller to accept mode change */ + while(--timeout) { + ret = readl(fsm->base + SPI_STA_MODE_CHANGE); + if (ret & 0x1) + break; + udelay(1); + } + + if (!timeout) + return -EBUSY; + + writel(mode, fsm->base + SPI_MODESELECT); + + return 0; +} + +static void stfsm_set_freq(struct stfsm *fsm, uint32_t spi_freq) +{ + uint32_t emi_freq; + uint32_t clk_div; + + /* TODO: Make this dynamic */ + emi_freq = STFSM_DEFAULT_EMI_FREQ; + + /* + * Calculate clk_div - values between 2 and 128 + * Multiple of 2, rounded up + */ + clk_div = 2*((emi_freq + (2*spi_freq - 1))/(2*spi_freq)); + if (clk_div < 2) + clk_div = 2; + else if (clk_div > 128) + clk_div = 128; + + /* + * Determine a suitable delay for the IP to complete a change of + * direction of the FIFO. The required delay is related to the clock + * divider used. The following heuristics are based on empirical tests, + * using a 100MHz EMI clock. + */ + if (clk_div <= 4) + fsm->fifo_dir_delay = 0; + else if (clk_div <= 10) + fsm->fifo_dir_delay = 1; + else + fsm->fifo_dir_delay = (clk_div + 9) / 10; + + dev_dbg(fsm->dev, "emi_clk = %uHZ, spi_freq = %uHZ, clk_div = %u\n", + emi_freq, spi_freq, clk_div); + + writel(clk_div, fsm->base + SPI_CLOCKDIV); +} + +static int stfsm_init(struct stfsm *fsm) +{ + int ret; + + /* Perform a soft reset of the FSM controller */ + writel(SEQ_CFG_SWRESET, fsm->base + SPI_FAST_SEQ_CFG); + udelay(1); + writel(0, fsm->base + SPI_FAST_SEQ_CFG); + + /* Set clock to 'safe' frequency initially */ + stfsm_set_freq(fsm, FLASH_SAFE_FREQ); + + /* Switch to FSM */ + ret = stfsm_set_mode(fsm, SPI_MODESELECT_FSM); + if (ret) + return ret; + + /* Set timing parameters */ + writel(SPI_CFG_DEVICE_ST | + SPI_CFG_DEFAULT_MIN_CS_HIGH | + SPI_CFG_DEFAULT_CS_SETUPHOLD | + SPI_CFG_DEFAULT_DATA_HOLD, + fsm->base + SPI_CONFIGDATA); + writel(STFSM_DEFAULT_WR_TIME, fsm->base + SPI_STATUS_WR_TIME_REG); + + /* Clear FIFO, just in case */ + stfsm_clear_fifo(fsm); + + return 0; +} + static int stfsm_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; struct resource *res; struct stfsm *fsm; + int ret; if (!np) { dev_err(&pdev->dev, "No DT found\n"); @@ -74,6 +191,12 @@ static int stfsm_probe(struct platform_device *pdev) mutex_init(&fsm->lock); + ret = stfsm_init(fsm); + if (ret) { + dev_err(&pdev->dev, "Failed to initialise FSM Controller\n"); + return ret; + } + platform_set_drvdata(pdev, fsm); fsm->mtd.dev.parent = &pdev->dev; diff --git a/drivers/mtd/devices/st_spi_fsm.h b/drivers/mtd/devices/st_spi_fsm.h index 11ca33a..7a8f1eb 100644 --- a/drivers/mtd/devices/st_spi_fsm.h +++ b/drivers/mtd/devices/st_spi_fsm.h @@ -69,6 +69,10 @@ #define SPI_CFG_CS_SETUPHOLD(x) (((x) & 0xff) << 16) #define SPI_CFG_DATA_HOLD(x) (((x) & 0xff) << 24) +#define SPI_CFG_DEFAULT_MIN_CS_HIGH SPI_CFG_MIN_CS_HIGH(0x0AA) +#define SPI_CFG_DEFAULT_CS_SETUPHOLD SPI_CFG_CS_SETUPHOLD(0xA0) +#define SPI_CFG_DEFAULT_DATA_HOLD SPI_CFG_DATA_HOLD(0x00) + /* * Register: SPI_FAST_SEQ_TRANSFER_SIZE */