From patchwork Sun Nov 17 04:30:15 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoffer Dall X-Patchwork-Id: 21551 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-pa0-f70.google.com (mail-pa0-f70.google.com [209.85.220.70]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id A187023FBB for ; Sun, 17 Nov 2013 04:29:21 +0000 (UTC) Received: by mail-pa0-f70.google.com with SMTP id fb1sf7429032pad.9 for ; Sat, 16 Nov 2013 20:29:20 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=o2B63sb78Eff16yAoeYThn4lwFXQl+DcgOtFEr4Z+VE=; b=Yo73Sk9hpx/lPbhtM2xp4KRNa4PjQuwP656WUYAydwcxvYejKHzmT7LFDCl2XnJkg1 7GU0ifQ/AtxCKpTu3ZntZ7vYlua2Oj0bB1Ead8OZKE24wnhBsOMLQG1K0UErlegbYxUB 3L4EaIlqLOsx2B56lMVes8EiI+i9wq1WT/zYAVGSpwD1oBGGLztuJRhZYK6HgKDr61r0 m+ZHPUrRLYtYm0VO2QnnfFTEGFP5AduWJwjv6gCfi4w0pC0CaaHYFU9dN+j1D4HoDVWq Qjaf5HcA3Z8O2x+bh58GA1bDXxt3zEI1WKyylkI1kc5AAHFEkA/CLuzPVMnIKZz5gcxl KVkg== X-Gm-Message-State: ALoCoQl4Cz9X1dKkMxIxA/Y/MXsURddNIggHC/N/NmHzz5fZPN8uRCipLmebVi/t1YtQgXirVdat X-Received: by 10.66.20.100 with SMTP id m4mr6161246pae.36.1384662560707; Sat, 16 Nov 2013 20:29:20 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.118.103 with SMTP id kl7ls2209857qeb.32.gmail; Sat, 16 Nov 2013 20:29:20 -0800 (PST) X-Received: by 10.58.19.195 with SMTP id h3mr422997vee.48.1384662560588; Sat, 16 Nov 2013 20:29:20 -0800 (PST) Received: from mail-ve0-f180.google.com (mail-ve0-f180.google.com [209.85.128.180]) by mx.google.com with ESMTPS id v5si5091501ves.4.2013.11.16.20.29.20 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 16 Nov 2013 20:29:20 -0800 (PST) Received-SPF: neutral (google.com: 209.85.128.180 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.180; Received: by mail-ve0-f180.google.com with SMTP id jz11so574529veb.39 for ; Sat, 16 Nov 2013 20:29:20 -0800 (PST) X-Received: by 10.52.244.15 with SMTP id xc15mr688977vdc.52.1384662560234; Sat, 16 Nov 2013 20:29:20 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp126853vcz; Sat, 16 Nov 2013 20:29:19 -0800 (PST) X-Received: by 10.66.122.40 with SMTP id lp8mr14401689pab.82.1384662559393; Sat, 16 Nov 2013 20:29:19 -0800 (PST) Received: from mail-pd0-f182.google.com (mail-pd0-f182.google.com [209.85.192.182]) by mx.google.com with ESMTPS id aq2si6214233pbc.310.2013.11.16.20.29.19 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 16 Nov 2013 20:29:19 -0800 (PST) Received-SPF: neutral (google.com: 209.85.192.182 is neither permitted nor denied by best guess record for domain of christoffer.dall@linaro.org) client-ip=209.85.192.182; Received: by mail-pd0-f182.google.com with SMTP id y13so5140456pdi.13 for ; Sat, 16 Nov 2013 20:29:19 -0800 (PST) X-Received: by 10.66.14.98 with SMTP id o2mr14860028pac.72.1384662558930; Sat, 16 Nov 2013 20:29:18 -0800 (PST) Received: from localhost.localdomain (c-67-169-181-221.hsd1.ca.comcast.net. [67.169.181.221]) by mx.google.com with ESMTPSA id ho3sm14498530pbb.23.2013.11.16.20.29.17 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 16 Nov 2013 20:29:18 -0800 (PST) From: Christoffer Dall To: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: patches@linaro.org, Christoffer Dall , Thomas Gleixner Subject: [PATCH v3 4/9] irqchip: arm-gic: Define additional MMIO offsets and masks Date: Sat, 16 Nov 2013 20:30:15 -0800 Message-Id: <1384662620-13795-5-git-send-email-christoffer.dall@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1384662620-13795-1-git-send-email-christoffer.dall@linaro.org> References: <1384662620-13795-1-git-send-email-christoffer.dall@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: christoffer.dall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.180 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Define CPU interface offsets for the GICC_ABPR, GICC_APR, and GICC_IIDR registers. Define distributor registers for the GICD_SPENDSGIR and the GICD_CPENDSGIR. KVM/ARM needs to know about these definitions to fully support save/restore of the VGIC. Also define some masks and shifts for the various GICH_VMCR fields. Cc: Thomas Gleixner Signed-off-by: Christoffer Dall Acked-by: Marc Zyngier --- include/linux/irqchip/arm-gic.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h index 0e5d9ec..28b28fc 100644 --- a/include/linux/irqchip/arm-gic.h +++ b/include/linux/irqchip/arm-gic.h @@ -17,6 +17,9 @@ #define GIC_CPU_EOI 0x10 #define GIC_CPU_RUNNINGPRI 0x14 #define GIC_CPU_HIGHPRI 0x18 +#define GIC_CPU_ALIAS_BINPOINT 0x1c +#define GIC_CPU_ACTIVEPRIO 0xd0 +#define GIC_CPU_IDENT 0xfc #define GIC_DIST_CTRL 0x000 #define GIC_DIST_CTR 0x004 @@ -31,6 +34,8 @@ #define GIC_DIST_TARGET 0x800 #define GIC_DIST_CONFIG 0xc00 #define GIC_DIST_SOFTINT 0xf00 +#define GIC_DIST_SGI_CLEAR 0xf10 +#define GIC_DIST_SGI_SET 0xf20 #define GICH_HCR 0x0 #define GICH_VTR 0x4 @@ -54,6 +59,15 @@ #define GICH_LR_ACTIVE_BIT (1 << 29) #define GICH_LR_EOI (1 << 19) +#define GICH_VMCR_CTRL_SHIFT 0 +#define GICH_VMCR_CTRL_MASK (0x21f << GICH_VMCR_CTRL_SHIFT) +#define GICH_VMCR_PRIMASK_SHIFT 27 +#define GICH_VMCR_PRIMASK_MASK (0x1f << GICH_VMCR_PRIMASK_SHIFT) +#define GICH_VMCR_BINPOINT_SHIFT 21 +#define GICH_VMCR_BINPOINT_MASK (0x7 << GICH_VMCR_BINPOINT_SHIFT) +#define GICH_VMCR_ALIAS_BINPOINT_SHIFT 18 +#define GICH_VMCR_ALIAS_BINPOINT_MASK (0x7 << GICH_VMCR_ALIAS_BINPOINT_SHIFT) + #define GICH_MISR_EOI (1 << 0) #define GICH_MISR_U (1 << 1)