From patchwork Fri Nov 22 16:22:46 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 21689 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-yh0-f72.google.com (mail-yh0-f72.google.com [209.85.213.72]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 3FC8523FDC for ; Fri, 22 Nov 2013 16:23:47 +0000 (UTC) Received: by mail-yh0-f72.google.com with SMTP id z6sf2408231yhz.3 for ; Fri, 22 Nov 2013 08:23:47 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=0W78bFXyvnxVy1ERvEagydKmV06jX1SFYmYrm6WBENE=; b=MEklktbdyJ2PjTIgYmjAiN3xtMr+8h1i4nplrxgVnlV7epual9ZVBEwUwb6AmWARtr mDfR99yZ+/v5OAYIgi6jt6iQOZvPUSi1oEJJJdRG5zMCCWfPmK9t1xhZdikZyz5PlZf5 3VChh1GuuLSc14jAb3AOYMCGWi3eE1PqDJc7ZqB4DwJQwZ1GPyZ22doScMXpTDlJE0AE /Y/bEJguUTscJeNu1MJi9z4G9Mpu84RzSyI3ZYObp4T9flXuGkJRfLkZzzo6bvSD2GLq V/5Rxp8SUbVGbWChZa6wCQrLSQM0k8p69sY6gCJ/De5N67Dzrto6wRls/r3wdMayh7Wl ZTiQ== X-Gm-Message-State: ALoCoQmxJ6rybOTu1YYK7cbOLoLrIIhDhlEFca9EYhJHTQyyDgi3uMbal3Pmym0CSD1HqMMN2Kzp X-Received: by 10.59.4.176 with SMTP id cf16mr4171438ved.10.1385137427036; Fri, 22 Nov 2013 08:23:47 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.105.34 with SMTP id gj2ls1051207qeb.52.gmail; Fri, 22 Nov 2013 08:23:46 -0800 (PST) X-Received: by 10.52.28.243 with SMTP id e19mr1829141vdh.36.1385137426828; Fri, 22 Nov 2013 08:23:46 -0800 (PST) Received: from mail-ve0-f180.google.com (mail-ve0-f180.google.com [209.85.128.180]) by mx.google.com with ESMTPS id on2si12877675vcb.90.2013.11.22.08.23.46 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 22 Nov 2013 08:23:46 -0800 (PST) Received-SPF: neutral (google.com: 209.85.128.180 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.180; Received: by mail-ve0-f180.google.com with SMTP id jz11so1032566veb.39 for ; Fri, 22 Nov 2013 08:23:46 -0800 (PST) X-Received: by 10.52.245.9 with SMTP id xk9mr10376600vdc.8.1385137426733; Fri, 22 Nov 2013 08:23:46 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp51516vcz; Fri, 22 Nov 2013 08:23:46 -0800 (PST) X-Received: by 10.68.175.66 with SMTP id by2mr3530346pbc.172.1385137425760; Fri, 22 Nov 2013 08:23:45 -0800 (PST) Received: from mail-pa0-f44.google.com (mail-pa0-f44.google.com [209.85.220.44]) by mx.google.com with ESMTPS id do3si14521047pbc.322.2013.11.22.08.23.45 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 22 Nov 2013 08:23:45 -0800 (PST) Received-SPF: neutral (google.com: 209.85.220.44 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) client-ip=209.85.220.44; Received: by mail-pa0-f44.google.com with SMTP id fa1so1520048pad.3 for ; Fri, 22 Nov 2013 08:23:45 -0800 (PST) X-Received: by 10.68.232.132 with SMTP id to4mr3571193pbc.141.1385137425318; Fri, 22 Nov 2013 08:23:45 -0800 (PST) Received: from localhost.localdomain (cpc15-aztw25-2-0-cust493.aztw.cable.virginm.net. [92.233.57.238]) by mx.google.com with ESMTPSA id qz9sm52962938pbc.3.2013.11.22.08.23.42 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 22 Nov 2013 08:23:44 -0800 (PST) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dwmw2@infradead.org, linux-mtd@lists.infradead.org, angus.clark@st.com Cc: linus.walleij@linaro.org, Lee Jones Subject: [PATCH 09/23] mtd: st_spi_fsm: Provide device look-up table Date: Fri, 22 Nov 2013 16:22:46 +0000 Message-Id: <1385137380-28968-10-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1385137380-28968-1-git-send-email-lee.jones@linaro.org> References: <1385137380-28968-1-git-send-email-lee.jones@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.180 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Supply a lookup table of all the devices we intend to support. This table is used to store device information such as; a human readable device name, their JEDEC ID (plus the extended version), sector size and amount, a bit store of a device's capabilities, its maximum running frequency and possible use of a per-device configuration call-back. Signed-off-by: Lee Jones --- drivers/mtd/devices/st_spi_fsm.h | 137 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 137 insertions(+) diff --git a/drivers/mtd/devices/st_spi_fsm.h b/drivers/mtd/devices/st_spi_fsm.h index 5c6c55e..e4e5bfa 100644 --- a/drivers/mtd/devices/st_spi_fsm.h +++ b/drivers/mtd/devices/st_spi_fsm.h @@ -253,4 +253,141 @@ struct stfsm_seq { } __attribute__((__packed__, aligned(4))); #define STFSM_SEQ_SIZE sizeof(struct stfsm_seq) +/* SPI Flash Device Table */ +struct flash_info { + char *name; + /* + * JEDEC id zero means "no ID" (most older chips); otherwise it has + * a high byte of zero plus three data bytes: the manufacturer id, + * then a two byte device id. + */ + u32 jedec_id; + u16 ext_id; + /* + * The size listed here is what works with FLASH_CMD_SE, which isn't + * necessarily called a "sector" by the vendor. + */ + unsigned sector_size; + u16 n_sectors; + u32 flags; + /* + * Note, where FAST_READ is supported, freq_max specifies the + * FAST_READ frequency, not the READ frequency. + */ + u32 max_freq; + int (*config)(struct stfsm *); +}; + +static struct flash_info flash_types[] = { + /* + * ST Microelectronics/Numonyx -- + * (newer production versions may have feature updates + * (eg faster operating frequency) + */ +#define M25P_FLAG (FLASH_FLAG_READ_WRITE | FLASH_FLAG_READ_FAST) + { "m25p40", 0x202013, 0, 64 * 1024, 8, M25P_FLAG, 25, NULL }, + { "m25p80", 0x202014, 0, 64 * 1024, 16, M25P_FLAG, 25, NULL }, + { "m25p16", 0x202015, 0, 64 * 1024, 32, M25P_FLAG, 25, NULL }, + { "m25p32", 0x202016, 0, 64 * 1024, 64, M25P_FLAG, 50, NULL }, + { "m25p64", 0x202017, 0, 64 * 1024, 128, M25P_FLAG, 50, NULL }, + { "m25p128", 0x202018, 0, 256 * 1024, 64, M25P_FLAG, 50, NULL }, + +#define M25PX_FLAG (FLASH_FLAG_READ_WRITE | \ + FLASH_FLAG_READ_FAST | \ + FLASH_FLAG_READ_1_1_2 | \ + FLASH_FLAG_WRITE_1_1_2) + { "m25px32", 0x207116, 0, 64 * 1024, 64, M25PX_FLAG, 75, NULL }, + { "m25px64", 0x207117, 0, 64 * 1024, 128, M25PX_FLAG, 75, NULL }, + +#define MX25_FLAG (FLASH_FLAG_READ_WRITE | \ + FLASH_FLAG_READ_FAST | \ + FLASH_FLAG_READ_1_1_2 | \ + FLASH_FLAG_READ_1_2_2 | \ + FLASH_FLAG_READ_1_1_4 | \ + FLASH_FLAG_READ_1_4_4 | \ + FLASH_FLAG_WRITE_1_4_4 | \ + FLASH_FLAG_SE_4K | \ + FLASH_FLAG_SE_32K) + { "mx25l25635e", 0xc22019, 0, 64*1024, 512, + (MX25_FLAG | FLASH_FLAG_32BITADDR | FLASH_FLAG_RESET), 70, NULL }, + +#define N25Q_FLAG (FLASH_FLAG_READ_WRITE | \ + FLASH_FLAG_READ_FAST | \ + FLASH_FLAG_READ_1_1_2 | \ + FLASH_FLAG_READ_1_2_2 | \ + FLASH_FLAG_READ_1_1_4 | \ + FLASH_FLAG_READ_1_4_4 | \ + FLASH_FLAG_WRITE_1_1_2 | \ + FLASH_FLAG_WRITE_1_2_2 | \ + FLASH_FLAG_WRITE_1_1_4 | \ + FLASH_FLAG_WRITE_1_4_4) + { "n25q128", 0x20ba18, 0, 64 * 1024, 256, N25Q_FLAG, 108, NULL }, + { "n25q256", 0x20ba19, 0, 64 * 1024, 512, + N25Q_FLAG | FLASH_FLAG_32BITADDR, 108, NULL }, + + /* + * Spansion S25FLxxxP + * - 256KiB and 64KiB sector variants (identified by ext. JEDEC) + */ +#define S25FLXXXP_FLAG (FLASH_FLAG_READ_WRITE | \ + FLASH_FLAG_READ_1_1_2 | \ + FLASH_FLAG_READ_1_2_2 | \ + FLASH_FLAG_READ_1_1_4 | \ + FLASH_FLAG_READ_1_4_4 | \ + FLASH_FLAG_WRITE_1_1_4 | \ + FLASH_FLAG_READ_FAST) + { "s25fl129p0", 0x012018, 0x4d00, 256 * 1024, 64, S25FLXXXP_FLAG, 80, + NULL }, + { "s25fl129p1", 0x012018, 0x4d01, 64 * 1024, 256, S25FLXXXP_FLAG, 80, + NULL }, + + /* + * Spansion S25FLxxxS + * - 256KiB and 64KiB sector variants (identified by ext. JEDEC) + * - RESET# signal supported by die but not bristled out on all + * package types. The package type is a function of board design, + * so this information is captured in the board's flags. + * - Supports 'DYB' sector protection. Depending on variant, sectors + * may default to locked state on power-on. + */ +#define S25FLXXXS_FLAG (S25FLXXXP_FLAG | \ + FLASH_FLAG_RESET | \ + FLASH_FLAG_DYB_LOCKING) + { "s25fl128s0", 0x012018, 0x0300, 256 * 1024, 64, S25FLXXXS_FLAG, 80, + NULL }, + { "s25fl128s1", 0x012018, 0x0301, 64 * 1024, 256, S25FLXXXS_FLAG, 80, + NULL }, + { "s25fl256s0", 0x010219, 0x4d00, 256 * 1024, 128, + S25FLXXXS_FLAG | FLASH_FLAG_32BITADDR, 80, NULL }, + { "s25fl256s1", 0x010219, 0x4d01, 64 * 1024, 512, + S25FLXXXS_FLAG | FLASH_FLAG_32BITADDR, 80, NULL }, + + /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ +#define W25X_FLAG (FLASH_FLAG_READ_WRITE | \ + FLASH_FLAG_READ_FAST | \ + FLASH_FLAG_READ_1_1_2 | \ + FLASH_FLAG_WRITE_1_1_2) + { "w25x40", 0xef3013, 0, 64 * 1024, 8, W25X_FLAG, 75, NULL }, + { "w25x80", 0xef3014, 0, 64 * 1024, 16, W25X_FLAG, 75, NULL }, + { "w25x16", 0xef3015, 0, 64 * 1024, 32, W25X_FLAG, 75, NULL }, + { "w25x32", 0xef3016, 0, 64 * 1024, 64, W25X_FLAG, 75, NULL }, + { "w25x64", 0xef3017, 0, 64 * 1024, 128, W25X_FLAG, 75, NULL }, + + /* Winbond -- w25q "blocks" are 64K, "sectors" are 4KiB */ +#define W25Q_FLAG (FLASH_FLAG_READ_WRITE | \ + FLASH_FLAG_READ_FAST | \ + FLASH_FLAG_READ_1_1_2 | \ + FLASH_FLAG_READ_1_2_2 | \ + FLASH_FLAG_READ_1_1_4 | \ + FLASH_FLAG_READ_1_4_4 | \ + FLASH_FLAG_WRITE_1_1_4) + { "w25q80", 0xef4014, 0, 64 * 1024, 16, W25Q_FLAG, 80, NULL }, + { "w25q16", 0xef4015, 0, 64 * 1024, 32, W25Q_FLAG, 80, NULL }, + { "w25q32", 0xef4016, 0, 64 * 1024, 64, W25Q_FLAG, 80, NULL }, + { "w25q64", 0xef4017, 0, 64 * 1024, 128, W25Q_FLAG, 80, NULL }, + + /* Sentinel */ + { NULL, 0x000000, 0, 0, 0, 0, 0, NULL }, +}; + #endif /* ST_SPI_FSM_H */