From patchwork Fri Nov 22 16:22:51 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 21694 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ob0-f199.google.com (mail-ob0-f199.google.com [209.85.214.199]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 3AD1223FDC for ; Fri, 22 Nov 2013 16:24:02 +0000 (UTC) Received: by mail-ob0-f199.google.com with SMTP id gq1sf4359299obb.6 for ; Fri, 22 Nov 2013 08:24:01 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=kba0j+bDIB1Arr2w8ikj6JbRpyjwg73hb5IOahP2rCQ=; b=AW5k2j/t79IM6vptRSOtu9r6/HJc/nzbn37/CeWYBhrPjl0T5mQM3VPVKavB7BE88P MCalCuqlVSSYq64+yJCj+p/23eEtNR1wt33f4fRS1tZrDg+oLwccw2hqcAc/JMMG8JHK 8aHUB0JCoFOQwhxM9v3aZMELkUTYpbnNFhaaxA+nOLLfaxmCU2CQPlct8d2s498WnFOJ doIcuxFsuqFNGZIeM2tGsJ7CxWXswnmghauvB9PH6Fpq6j7Q6ZjvcjahqG8yHScHLO0X RlAMIQvUnMjb3pxyJi11bkYUr4M259YPUkRkO4kCekp6jgc1Ts/f3h1ctok0jSo4YoNb 0gaQ== X-Gm-Message-State: ALoCoQnIFENiLSNAeohVimhlpB9GUeZpkGVd5TPxcf8CPe2frUTMMfJMUuz+ngCOLTvoqIbMpfXt X-Received: by 10.182.158.4 with SMTP id wq4mr4450492obb.18.1385137441800; Fri, 22 Nov 2013 08:24:01 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.25.196 with SMTP id e4ls1046914qeg.6.gmail; Fri, 22 Nov 2013 08:24:01 -0800 (PST) X-Received: by 10.221.44.136 with SMTP id ug8mr12067481vcb.13.1385137441676; Fri, 22 Nov 2013 08:24:01 -0800 (PST) Received: from mail-ve0-f173.google.com (mail-ve0-f173.google.com [209.85.128.173]) by mx.google.com with ESMTPS id gs7si12878964veb.91.2013.11.22.08.24.01 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 22 Nov 2013 08:24:01 -0800 (PST) Received-SPF: neutral (google.com: 209.85.128.173 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.173; Received: by mail-ve0-f173.google.com with SMTP id oz11so1049993veb.4 for ; Fri, 22 Nov 2013 08:24:01 -0800 (PST) X-Received: by 10.58.168.205 with SMTP id zy13mr12140262veb.19.1385137441600; Fri, 22 Nov 2013 08:24:01 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp51538vcz; Fri, 22 Nov 2013 08:24:01 -0800 (PST) X-Received: by 10.66.119.172 with SMTP id kv12mr12871032pab.34.1385137440340; Fri, 22 Nov 2013 08:24:00 -0800 (PST) Received: from mail-pd0-f170.google.com (mail-pd0-f170.google.com [209.85.192.170]) by mx.google.com with ESMTPS id pz2si20196227pac.57.2013.11.22.08.24.00 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 22 Nov 2013 08:24:00 -0800 (PST) Received-SPF: neutral (google.com: 209.85.192.170 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) client-ip=209.85.192.170; Received: by mail-pd0-f170.google.com with SMTP id g10so1460784pdj.1 for ; Fri, 22 Nov 2013 08:24:00 -0800 (PST) X-Received: by 10.66.142.170 with SMTP id rx10mr13135749pab.117.1385137439950; Fri, 22 Nov 2013 08:23:59 -0800 (PST) Received: from localhost.localdomain (cpc15-aztw25-2-0-cust493.aztw.cable.virginm.net. [92.233.57.238]) by mx.google.com with ESMTPSA id qz9sm52962938pbc.3.2013.11.22.08.23.57 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 22 Nov 2013 08:23:59 -0800 (PST) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dwmw2@infradead.org, linux-mtd@lists.infradead.org, angus.clark@st.com Cc: linus.walleij@linaro.org, Lee Jones Subject: [PATCH 14/23] mtd: st_spi_fsm: Prepare the read/write FSM message sequence(s) Date: Fri, 22 Nov 2013 16:22:51 +0000 Message-Id: <1385137380-28968-15-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1385137380-28968-1-git-send-email-lee.jones@linaro.org> References: <1385137380-28968-1-git-send-email-lee.jones@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.173 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The FSM Serial Flash Controller is driven by issuing a standard set of register writes we call a message sequence. This patch supplies a method to prepare read/write FSM message sequence(s) based on chip capability and configuration. Signed-off-by: Lee Jones --- drivers/mtd/devices/st_spi_fsm.c | 69 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/drivers/mtd/devices/st_spi_fsm.c b/drivers/mtd/devices/st_spi_fsm.c index 5bced00..80657a4 100644 --- a/drivers/mtd/devices/st_spi_fsm.c +++ b/drivers/mtd/devices/st_spi_fsm.c @@ -97,6 +97,75 @@ stfsm_search_seq_rw_configs(struct stfsm *fsm, return NULL; } +/* Prepare a READ/WRITE sequence according to configuration parameters */ +static void stfsm_prepare_rw_seq(struct stfsm *fsm, + struct stfsm_seq *seq, + struct seq_rw_config *cfg) +{ + int addr1_cycles, addr2_cycles; + int i = 0; + + memset(seq, 0, STFSM_SEQ_SIZE); + + /* Add READ/WRITE OPC */ + seq->seq_opc[i++] = (SEQ_OPC_PADS_1 | + SEQ_OPC_CYCLES(8) | + SEQ_OPC_OPCODE(cfg->cmd)); + + /* Add WREN OPC for a WRITE sequence */ + if (cfg->write) + seq->seq_opc[i++] = (SEQ_OPC_PADS_1 | + SEQ_OPC_CYCLES(8) | + SEQ_OPC_OPCODE(FLASH_CMD_WREN) | + SEQ_OPC_CSDEASSERT); + + /* Address configuration (24 or 32-bit addresses) */ + addr1_cycles = (fsm->info->flags & FLASH_FLAG_32BITADDR) ? 16 : 8; + addr1_cycles /= cfg->addr_pads; + addr2_cycles = 16 / cfg->addr_pads; + seq->addr_cfg = ((addr1_cycles & 0x3f) << 0 | /* ADD1 cycles */ + (cfg->addr_pads - 1) << 6 | /* ADD1 pads */ + (addr2_cycles & 0x3f) << 16 | /* ADD2 cycles */ + ((cfg->addr_pads - 1) << 22)); /* ADD2 pads */ + + /* Data/Sequence configuration */ + seq->seq_cfg = ((cfg->data_pads - 1) << 16 | + SEQ_CFG_STARTSEQ | + SEQ_CFG_CSDEASSERT); + if (!cfg->write) + seq->seq_cfg |= SEQ_CFG_READNOTWRITE; + + /* Mode configuration (no. of pads taken from addr cfg) */ + seq->mode = ((cfg->mode_data & 0xff) << 0 | /* data */ + (cfg->mode_cycles & 0x3f) << 16 | /* cycles */ + (cfg->addr_pads - 1) << 22); /* pads */ + + /* Dummy configuration (no. of pads taken from addr cfg) */ + seq->dummy = ((cfg->dummy_cycles & 0x3f) << 16 | /* cycles */ + (cfg->addr_pads - 1) << 22); /* pads */ + + + /* Instruction sequence */ + i = 0; + if (cfg->write) + seq->seq[i++] = STFSM_INST_CMD2; + + seq->seq[i++] = STFSM_INST_CMD1; + + seq->seq[i++] = STFSM_INST_ADD1; + seq->seq[i++] = STFSM_INST_ADD2; + + if (cfg->mode_cycles) + seq->seq[i++] = STFSM_INST_MODE; + + if (cfg->dummy_cycles) + seq->seq[i++] = STFSM_INST_DUMMY; + + seq->seq[i++] = + cfg->write ? STFSM_INST_DATA_WRITE : STFSM_INST_DATA_READ; + seq->seq[i++] = STFSM_INST_STOP; +} + static void stfsm_read_fifo(struct stfsm *fsm, uint32_t *buf, const uint32_t size) {