From patchwork Fri Nov 22 16:22:56 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 21699 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ve0-f200.google.com (mail-ve0-f200.google.com [209.85.128.200]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 6D4FB23FDC for ; Fri, 22 Nov 2013 16:24:16 +0000 (UTC) Received: by mail-ve0-f200.google.com with SMTP id jw12sf2862418veb.11 for ; Fri, 22 Nov 2013 08:24:16 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=I4mnMxekS1GFLWv3ezsVrZS+ZHVciT7M/Hmn2SoIiog=; b=U2LElPtHQZ5zpE4443WJIEUAoo0uGfl9MBOsHE3Qe7aqb78kk2EGkbMwCAqnhGm2v/ Xx8ulYtmuKeVsCiEuv0rTm1ai7lLG6i7Wuo8SJekueWlKF6VnbfDwnqGd3b49ffyLH9i QVl2FM1oezpBrpBIliVTn6QV+BphGAtMkmEizCxHcxnEUrVAb7ztb7aBaWUuxWWY+LFe mNbZLrCOfjsw02SoMyd/PJnsqYGdmaEf12d6pBG5jHu0f1/qSAB6XNGy7rd9kzVJLEoV Bw/97r1pPFerquDdv2wEB76kbGp8uEezyf6mJJ4FR+u4iJJeEcDqXO2TuAn9etQG96uV Sh9g== X-Gm-Message-State: ALoCoQlpIYOedLnq8xYwmNUUO8tEMgixRtJc7F+J4YF9ui2hFBX+ETdQpGEv4sL0DKPRb8CalfF9 X-Received: by 10.58.94.162 with SMTP id dd2mr4582178veb.21.1385137456304; Fri, 22 Nov 2013 08:24:16 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.59.36 with SMTP id w4ls1054198qeq.67.gmail; Fri, 22 Nov 2013 08:24:16 -0800 (PST) X-Received: by 10.58.217.130 with SMTP id oy2mr2627026vec.24.1385137456167; Fri, 22 Nov 2013 08:24:16 -0800 (PST) Received: from mail-ve0-f174.google.com (mail-ve0-f174.google.com [209.85.128.174]) by mx.google.com with ESMTPS id rw8si12835728vdc.135.2013.11.22.08.24.16 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 22 Nov 2013 08:24:16 -0800 (PST) Received-SPF: neutral (google.com: 209.85.128.174 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.174; Received: by mail-ve0-f174.google.com with SMTP id pa12so1054117veb.33 for ; Fri, 22 Nov 2013 08:24:16 -0800 (PST) X-Received: by 10.220.192.198 with SMTP id dr6mr11972757vcb.19.1385137456070; Fri, 22 Nov 2013 08:24:16 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp51559vcz; Fri, 22 Nov 2013 08:24:15 -0800 (PST) X-Received: by 10.66.142.107 with SMTP id rv11mr13235227pab.17.1385137454956; Fri, 22 Nov 2013 08:24:14 -0800 (PST) Received: from mail-pb0-f45.google.com (mail-pb0-f45.google.com [209.85.160.45]) by mx.google.com with ESMTPS id xa2si12531697pab.26.2013.11.22.08.24.14 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 22 Nov 2013 08:24:14 -0800 (PST) Received-SPF: neutral (google.com: 209.85.160.45 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) client-ip=209.85.160.45; Received: by mail-pb0-f45.google.com with SMTP id rp16so1508843pbb.4 for ; Fri, 22 Nov 2013 08:24:14 -0800 (PST) X-Received: by 10.66.144.40 with SMTP id sj8mr12985950pab.4.1385137454567; Fri, 22 Nov 2013 08:24:14 -0800 (PST) Received: from localhost.localdomain (cpc15-aztw25-2-0-cust493.aztw.cable.virginm.net. [92.233.57.238]) by mx.google.com with ESMTPSA id qz9sm52962938pbc.3.2013.11.22.08.24.11 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 22 Nov 2013 08:24:13 -0800 (PST) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dwmw2@infradead.org, linux-mtd@lists.infradead.org, angus.clark@st.com Cc: linus.walleij@linaro.org, Lee Jones Subject: [PATCH 19/23] mtd: st_spi_fsm: Add a check to if the chip can handle an SoC reset Date: Fri, 22 Nov 2013 16:22:56 +0000 Message-Id: <1385137380-28968-20-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1385137380-28968-1-git-send-email-lee.jones@linaro.org> References: <1385137380-28968-1-git-send-email-lee.jones@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.174 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Based on information we can obtain though platform specific data and/or chip capabilities we are able to determine whether or not we can handle a SoC reset or not. To find out why this is important please read the comment provided in the patch. Signed-off-by: Lee Jones --- drivers/mtd/devices/st_spi_fsm.c | 38 ++++++++++++++++++++++++++++++++++++++ drivers/mtd/devices/st_spi_fsm.h | 2 ++ 2 files changed, 40 insertions(+) diff --git a/drivers/mtd/devices/st_spi_fsm.c b/drivers/mtd/devices/st_spi_fsm.c index 85abf9a..9a66c99 100644 --- a/drivers/mtd/devices/st_spi_fsm.c +++ b/drivers/mtd/devices/st_spi_fsm.c @@ -128,6 +128,40 @@ static void stfsm_wait_seq(struct stfsm *fsm) dev_err(fsm->dev, "timeout on sequence completion\n"); } +/* + * SoC reset on 'boot-from-spi' systems + * + * Certain modes of operation cause the Flash device to enter a particular state + * for a period of time (e.g. 'Erase Sector', 'Quad Enable', and 'Enter 32-bit + * Addr' commands). On boot-from-spi systems, it is important to consider what + * happens if a warm reset occurs during this period. The SPIBoot controller + * assumes that Flash device is in its default reset state, 24-bit address mode, + * and ready to accept commands. This can be achieved using some form of + * on-board logic/controller to force a device POR in response to a SoC-level + * reset or by making use of the device reset signal if available (limited + * number of devices only). + * + * Failure to take such precautions can cause problems following a warm reset. + * For some operations (e.g. ERASE), there is little that can be done. For + * other modes of operation (e.g. 32-bit addressing), options are often + * available that can help minimise the window in which a reset could cause a + * problem. + * + */ +static bool stfsm_can_handle_soc_reset(struct stfsm *fsm) +{ + /* Reset signal is available on the board and supported by the device */ + if (fsm->reset_signal && fsm->info->flags & FLASH_FLAG_RESET) + return true; + + /* Board-level logic forces a power-on-reset */ + if (fsm->reset_por) + return true; + + /* Reset is not properly handled and may result in failure to reboot */ + return false; +} + /* Configure 'addr_cfg' according to addressing mode */ static void stfsm_prepare_erasesec_seq(struct stfsm *fsm, struct stfsm_seq *seq) @@ -442,6 +476,10 @@ static void stfsm_fetch_platform_configs(struct platform_device *pdev) goto boot_device_fail; } + fsm->reset_signal = of_property_read_bool(np, "st,reset-signal"); + + fsm->reset_por = of_property_read_bool(np, "st,reset-por"); + /* Where in the syscon the boot device information lives */ ret = of_property_read_u32(np, "boot-device-reg", &boot_device_reg); if (ret) diff --git a/drivers/mtd/devices/st_spi_fsm.h b/drivers/mtd/devices/st_spi_fsm.h index 2e12bff..8eb9e20 100644 --- a/drivers/mtd/devices/st_spi_fsm.h +++ b/drivers/mtd/devices/st_spi_fsm.h @@ -239,6 +239,8 @@ struct stfsm { uint32_t fifo_dir_delay; bool booted_from_spi; + bool reset_signal; + bool reset_por; }; struct stfsm_seq {