From patchwork Fri Nov 29 12:19:08 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 21877 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ie0-f198.google.com (mail-ie0-f198.google.com [209.85.223.198]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 8A65123FEA for ; Fri, 29 Nov 2013 12:20:13 +0000 (UTC) Received: by mail-ie0-f198.google.com with SMTP id tp5sf31513667ieb.9 for ; Fri, 29 Nov 2013 04:20:13 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=d7WOHdnVXOzmsqEjWH6AHDTXpRJdZ1Zu7ecoDArvGZw=; b=MwJWCBCfFAX8unb88Qf1zHZ9u3OET4G/HgkiGq/aWwZ7THSfqTfp3j4/kiX5364rvf vj6xq1nOVVMSIj+dV36v1X7uWNJJK2AekqnMXhXchFm+UVCrpUF02+ETLD67Ez11PaQA QNLJZPfIKL6VaD62uJRpgdfdvHeIBERra5M2ERJgEDH1qsfE8oej7JuoAUDWqsRSdrw2 vHVMWtZB7lixVqQFP9EWzoxoVa6ipqghXIN4kVFi+mJXU9zM5yCf/fGpg+hKJtSMmFVH whUrC+wZ5IE6vgjXTd/bGM4muuJDH9HqlQcIFl5dD3lhcV1/YwBbTVDYGss15h6MjnnG TufQ== X-Gm-Message-State: ALoCoQlxTQQKl7YuyKDt4d1ZBIAFqSRDQOqUKB7ZXzngg4BIS09fYsHP5pGtqXSmgTdx0qYBfYyn X-Received: by 10.42.112.138 with SMTP id y10mr561508icp.28.1385727613240; Fri, 29 Nov 2013 04:20:13 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.94.41 with SMTP id cz9ls3082859qeb.57.gmail; Fri, 29 Nov 2013 04:20:13 -0800 (PST) X-Received: by 10.220.188.8 with SMTP id cy8mr21966vcb.78.1385727613148; Fri, 29 Nov 2013 04:20:13 -0800 (PST) Received: from mail-ve0-f171.google.com (mail-ve0-f171.google.com [209.85.128.171]) by mx.google.com with ESMTPS id ud10si24771526vcb.141.2013.11.29.04.20.13 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 29 Nov 2013 04:20:13 -0800 (PST) Received-SPF: neutral (google.com: 209.85.128.171 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.171; Received: by mail-ve0-f171.google.com with SMTP id pa12so7085032veb.30 for ; Fri, 29 Nov 2013 04:20:13 -0800 (PST) X-Received: by 10.52.35.41 with SMTP id e9mr31108vdj.79.1385727613056; Fri, 29 Nov 2013 04:20:13 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp87435vcz; Fri, 29 Nov 2013 04:20:12 -0800 (PST) X-Received: by 10.236.19.77 with SMTP id m53mr845952yhm.143.1385727612497; Fri, 29 Nov 2013 04:20:12 -0800 (PST) Received: from mail-yh0-f48.google.com (mail-yh0-f48.google.com [209.85.213.48]) by mx.google.com with ESMTPS id v1si36345824yhg.151.2013.11.29.04.20.12 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 29 Nov 2013 04:20:12 -0800 (PST) Received-SPF: neutral (google.com: 209.85.213.48 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) client-ip=209.85.213.48; Received: by mail-yh0-f48.google.com with SMTP id f73so6605829yha.35 for ; Fri, 29 Nov 2013 04:20:12 -0800 (PST) X-Received: by 10.236.0.193 with SMTP id 41mr1940074yhb.82.1385727612347; Fri, 29 Nov 2013 04:20:12 -0800 (PST) Received: from localhost.localdomain (cpc15-aztw25-2-0-cust493.aztw.cable.virginm.net. [92.233.57.238]) by mx.google.com with ESMTPSA id m29sm101911689yho.14.2013.11.29.04.20.10 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 29 Nov 2013 04:20:12 -0800 (PST) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dwmw2@infradead.org Cc: linus.walleij@linaro.org, linux-mtd@lists.infradead.org, angus.clark@st.com, Lee Jones Subject: [PATCH v3 19/36] mtd: st_spi_fsm: Add a check to if the chip can handle an SoC reset Date: Fri, 29 Nov 2013 12:19:08 +0000 Message-Id: <1385727565-25794-20-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1385727565-25794-1-git-send-email-lee.jones@linaro.org> References: <1385727565-25794-1-git-send-email-lee.jones@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.171 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Based on information we can obtain though platform specific data and/or chip capabilities we are able to determine whether or not we can handle a SoC reset or not. To find out why this is important please read the comment provided in the patch. Signed-off-by: Lee Jones --- drivers/mtd/devices/st_spi_fsm.c | 38 ++++++++++++++++++++++++++++++++++++++ drivers/mtd/devices/st_spi_fsm.h | 2 ++ 2 files changed, 40 insertions(+) diff --git a/drivers/mtd/devices/st_spi_fsm.c b/drivers/mtd/devices/st_spi_fsm.c index 14891ea..4edd3f2 100644 --- a/drivers/mtd/devices/st_spi_fsm.c +++ b/drivers/mtd/devices/st_spi_fsm.c @@ -170,6 +170,40 @@ static void stfsm_read_fifo(struct stfsm *fsm, uint32_t *buf, } } +/* + * SoC reset on 'boot-from-spi' systems + * + * Certain modes of operation cause the Flash device to enter a particular state + * for a period of time (e.g. 'Erase Sector', 'Quad Enable', and 'Enter 32-bit + * Addr' commands). On boot-from-spi systems, it is important to consider what + * happens if a warm reset occurs during this period. The SPIBoot controller + * assumes that Flash device is in its default reset state, 24-bit address mode, + * and ready to accept commands. This can be achieved using some form of + * on-board logic/controller to force a device POR in response to a SoC-level + * reset or by making use of the device reset signal if available (limited + * number of devices only). + * + * Failure to take such precautions can cause problems following a warm reset. + * For some operations (e.g. ERASE), there is little that can be done. For + * other modes of operation (e.g. 32-bit addressing), options are often + * available that can help minimise the window in which a reset could cause a + * problem. + * + */ +static bool stfsm_can_handle_soc_reset(struct stfsm *fsm) +{ + /* Reset signal is available on the board and supported by the device */ + if (fsm->reset_signal && fsm->info->flags & FLASH_FLAG_RESET) + return true; + + /* Board-level logic forces a power-on-reset */ + if (fsm->reset_por) + return true; + + /* Reset is not properly handled and may result in failure to reboot */ + return false; +} + /* Configure 'addr_cfg' according to addressing mode */ static void stfsm_prepare_erasesec_seq(struct stfsm *fsm, struct stfsm_seq *seq) @@ -442,6 +476,10 @@ static void stfsm_fetch_platform_configs(struct platform_device *pdev) goto boot_device_fail; } + fsm->reset_signal = of_property_read_bool(np, "st,reset-signal"); + + fsm->reset_por = of_property_read_bool(np, "st,reset-por"); + /* Where in the syscon the boot device information lives */ ret = of_property_read_u32(np, "boot-device-reg", &boot_device_reg); if (ret) diff --git a/drivers/mtd/devices/st_spi_fsm.h b/drivers/mtd/devices/st_spi_fsm.h index a0eafa9..0548511 100644 --- a/drivers/mtd/devices/st_spi_fsm.h +++ b/drivers/mtd/devices/st_spi_fsm.h @@ -239,6 +239,8 @@ struct stfsm { uint32_t fifo_dir_delay; bool booted_from_spi; + bool reset_signal; + bool reset_por; }; struct stfsm_seq {