From patchwork Fri Nov 29 12:19:12 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 21881 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oa0-f71.google.com (mail-oa0-f71.google.com [209.85.219.71]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 612FE23FC4 for ; Fri, 29 Nov 2013 12:20:21 +0000 (UTC) Received: by mail-oa0-f71.google.com with SMTP id i4sf32029216oah.10 for ; Fri, 29 Nov 2013 04:20:21 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=AN4gTzIrZSbHTXXlO3Xg6//c6oiU7SyZAZ4ULkrUDLM=; b=A493Hk73ZpiFS8bZpadMm+qTQQhysMKWlipl3j6BO257MFNLktRepwZ76MuKSRmjyc UbbELF0RjI+rdjVFWxFha73ZioNX8NFkN4DSStFw7G6YS096xM3fBLfH1jhtOtTwLnrl BzmPHqx44YjUTuqxuoP/DB2pTRIyMTnLNpzWGfwaOiGBEi/iEvPmmes7pcKUoFffr/0z fW9C+NciaIxKg9p25WrEh/fvB04sfPrEnYcQfu16TM+8ssgr1nXOAz038K2l81pinzre vKcp25SkakT9bRSNrsx3TaNko2KtVto1gfosHlgv4OX4xfBLR4MRs2Ka86bR6vu9Ucrs wYdg== X-Gm-Message-State: ALoCoQmVHPXE2uvxzupDmmptcjqQ5DjE09V/GfmOt3HIpTqL4Pt25WUTLOwRZ9JKJT8bpW7CIc2d X-Received: by 10.50.61.242 with SMTP id t18mr2625694igr.3.1385727620997; Fri, 29 Nov 2013 04:20:20 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.35.108 with SMTP id g12ls415190qej.81.gmail; Fri, 29 Nov 2013 04:20:20 -0800 (PST) X-Received: by 10.220.192.198 with SMTP id dr6mr21732046vcb.19.1385727620913; Fri, 29 Nov 2013 04:20:20 -0800 (PST) Received: from mail-ve0-f176.google.com (mail-ve0-f176.google.com [209.85.128.176]) by mx.google.com with ESMTPS id vq3si24783514veb.103.2013.11.29.04.20.20 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 29 Nov 2013 04:20:20 -0800 (PST) Received-SPF: neutral (google.com: 209.85.128.176 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.176; Received: by mail-ve0-f176.google.com with SMTP id oz11so6800290veb.21 for ; Fri, 29 Nov 2013 04:20:20 -0800 (PST) X-Received: by 10.52.187.66 with SMTP id fq2mr27460vdc.93.1385727620831; Fri, 29 Nov 2013 04:20:20 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp87444vcz; Fri, 29 Nov 2013 04:20:20 -0800 (PST) X-Received: by 10.224.79.207 with SMTP id q15mr2731490qak.33.1385727620322; Fri, 29 Nov 2013 04:20:20 -0800 (PST) Received: from mail-yh0-f44.google.com (mail-yh0-f44.google.com [209.85.213.44]) by mx.google.com with ESMTPS id k3si21849056qao.74.2013.11.29.04.20.20 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 29 Nov 2013 04:20:20 -0800 (PST) Received-SPF: neutral (google.com: 209.85.213.44 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) client-ip=209.85.213.44; Received: by mail-yh0-f44.google.com with SMTP id f64so6727991yha.17 for ; Fri, 29 Nov 2013 04:20:20 -0800 (PST) X-Received: by 10.236.2.166 with SMTP id 26mr1949607yhf.79.1385727619874; Fri, 29 Nov 2013 04:20:19 -0800 (PST) Received: from localhost.localdomain (cpc15-aztw25-2-0-cust493.aztw.cable.virginm.net. [92.233.57.238]) by mx.google.com with ESMTPSA id m29sm101911689yho.14.2013.11.29.04.20.18 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 29 Nov 2013 04:20:19 -0800 (PST) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dwmw2@infradead.org Cc: linus.walleij@linaro.org, linux-mtd@lists.infradead.org, angus.clark@st.com, Lee Jones Subject: [PATCH v3 23/36] mtd: st_spi_fsm: Supply the N25Qxxx specific read configurations Date: Fri, 29 Nov 2013 12:19:12 +0000 Message-Id: <1385727565-25794-24-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1385727565-25794-1-git-send-email-lee.jones@linaro.org> References: <1385727565-25794-1-git-send-email-lee.jones@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.176 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The N25Qxxx Serial Flash devices required different sequence configurations depending on whether they're running in 24bit (3Byte) or 32bit (4Byte) mode. We provide those here. Signed-off-by: Lee Jones --- drivers/mtd/devices/st_spi_fsm.c | 43 ++++++++++++++++++++++++++++++++++++++++ drivers/mtd/devices/st_spi_fsm.h | 10 ++++++++++ 2 files changed, 53 insertions(+) diff --git a/drivers/mtd/devices/st_spi_fsm.c b/drivers/mtd/devices/st_spi_fsm.c index 0ecf248..3a6b233 100644 --- a/drivers/mtd/devices/st_spi_fsm.c +++ b/drivers/mtd/devices/st_spi_fsm.c @@ -55,6 +55,49 @@ static struct seq_rw_config default_write_configs[] = { {0x00, 0, 0, 0, 0, 0x00, 0, 0}, }; +/* + * [N25Qxxx] Configuration + */ +#define N25Q_VCR_DUMMY_CYCLES(x) (((x) & 0xf) << 4) +#define N25Q_VCR_XIP_DISABLED ((uint8_t)0x1 << 3) +#define N25Q_VCR_WRAP_CONT 0x3 + +/* N25Q 3-byte Address READ configurations + * - 'FAST' variants configured for 8 dummy cycles. + * + * Note, the number of dummy cycles used for 'FAST' READ operations is + * configurable and would normally be tuned according to the READ command and + * operating frequency. However, this applies universally to all 'FAST' READ + * commands, including those used by the SPIBoot controller, and remains in + * force until the device is power-cycled. Since the SPIBoot controller is + * hard-wired to use 8 dummy cycles, we must configure the device to also use 8 + * cycles. + */ +static struct seq_rw_config n25q_read3_configs[] = { + {FLASH_FLAG_READ_1_4_4, FLASH_CMD_READ_1_4_4, 0, 4, 4, 0x00, 0, 8}, + {FLASH_FLAG_READ_1_1_4, FLASH_CMD_READ_1_1_4, 0, 1, 4, 0x00, 0, 8}, + {FLASH_FLAG_READ_1_2_2, FLASH_CMD_READ_1_2_2, 0, 2, 2, 0x00, 0, 8}, + {FLASH_FLAG_READ_1_1_2, FLASH_CMD_READ_1_1_2, 0, 1, 2, 0x00, 0, 8}, + {FLASH_FLAG_READ_FAST, FLASH_CMD_READ_FAST, 0, 1, 1, 0x00, 0, 8}, + {FLASH_FLAG_READ_WRITE, FLASH_CMD_READ, 0, 1, 1, 0x00, 0, 0}, + {0x00, 0, 0, 0, 0, 0x00, 0, 0}, +}; + +/* N25Q 4-byte Address READ configurations + * - use special 4-byte address READ commands (reduces overheads, and + * reduces risk of hitting watchdog reset issues). + * - 'FAST' variants configured for 8 dummy cycles (see note above.) + */ +static struct seq_rw_config n25q_read4_configs[] = { + {FLASH_FLAG_READ_1_4_4, FLASH_CMD_READ4_1_4_4, 0, 4, 4, 0x00, 0, 8}, + {FLASH_FLAG_READ_1_1_4, FLASH_CMD_READ4_1_1_4, 0, 1, 4, 0x00, 0, 8}, + {FLASH_FLAG_READ_1_2_2, FLASH_CMD_READ4_1_2_2, 0, 2, 2, 0x00, 0, 8}, + {FLASH_FLAG_READ_1_1_2, FLASH_CMD_READ4_1_1_2, 0, 1, 2, 0x00, 0, 8}, + {FLASH_FLAG_READ_FAST, FLASH_CMD_READ4_FAST, 0, 1, 1, 0x00, 0, 8}, + {FLASH_FLAG_READ_WRITE, FLASH_CMD_READ4, 0, 1, 1, 0x00, 0, 0}, + {0x00, 0, 0, 0, 0, 0x00, 0, 0}, +}; + static struct stfsm_seq stfsm_seq_en_32bit_addr;/* Dynamically populated */ static struct stfsm_seq stfsm_seq_read_jedec = { diff --git a/drivers/mtd/devices/st_spi_fsm.h b/drivers/mtd/devices/st_spi_fsm.h index 0548511..6699174 100644 --- a/drivers/mtd/devices/st_spi_fsm.h +++ b/drivers/mtd/devices/st_spi_fsm.h @@ -229,6 +229,15 @@ #define FLASH_CMD_READ4_1_1_4 0x6c #define FLASH_CMD_READ4_1_4_4 0xec +/* + * Flags to tweak operation of default read/write/erase routines + */ +#define CFG_READ_TOGGLE_32BIT_ADDR 0x00000001 +#define CFG_WRITE_TOGGLE_32BIT_ADDR 0x00000002 +#define CFG_WRITE_EX_32BIT_ADDR_DELAY 0x00000004 +#define CFG_ERASESEC_TOGGLE_32BIT_ADDR 0x00000008 +#define CFG_S25FL_CHECK_ERROR_FLAGS 0x00000010 + struct stfsm { struct device *dev; void __iomem *base; @@ -237,6 +246,7 @@ struct stfsm { struct mutex lock; struct flash_info *info; + uint32_t configuration; uint32_t fifo_dir_delay; bool booted_from_spi; bool reset_signal;