From patchwork Wed Jan 8 13:47:03 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 22956 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-qe0-f72.google.com (mail-qe0-f72.google.com [209.85.128.72]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 37679202E2 for ; Wed, 8 Jan 2014 13:48:57 +0000 (UTC) Received: by mail-qe0-f72.google.com with SMTP id 5sf2625628qeb.11 for ; Wed, 08 Jan 2014 05:48:56 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=fBxR1FdsctnsbcHUGhf4YluRzwq5yaB6KgmykjcA8bk=; b=P8mZj5ufCBdoJ52sP635DCGO1hMhJBBSn4e6FwTVCwpY/ArdLIXFzt0L/DlndI379g c//Teq9bpnBwyZldr2Hu4CM8z/+RKNvC64QF7xhw0YySfgHvkkoV0nOjUz8VL3lKyXSr m/b3kYdRy1Y2fYig6ICh0vvUfAjS+QHvXgX/yWyF77gQxTFX1OrsCEUG7XfKEBkITTjZ QNQcAratKLsP/V5AQQ44b/wYS6evwbqONuH+263OEmZzJ8G7CJtSwsIvYOvq55nClSPN ekpNkO1UalYs9ekWTOQQPm56KHj9jKx1hThP+ixu5CBg5DmdwITPAlrx2UMbqQuIMnA2 enTg== X-Gm-Message-State: ALoCoQnmGppmvxtzyQ1CaJEyB8xDgqq2OcEzLiZoeQ1E7rWvut1NrjmGqobLTB7qFDVsVTtETgMz X-Received: by 10.58.118.231 with SMTP id kp7mr25767705veb.36.1389188936462; Wed, 08 Jan 2014 05:48:56 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.104.40 with SMTP id gb8ls530367qeb.27.gmail; Wed, 08 Jan 2014 05:48:56 -0800 (PST) X-Received: by 10.52.99.199 with SMTP id es7mr2722086vdb.50.1389188936384; Wed, 08 Jan 2014 05:48:56 -0800 (PST) Received: from mail-ve0-f182.google.com (mail-ve0-f182.google.com [209.85.128.182]) by mx.google.com with ESMTPS id tj7si595148vdc.111.2014.01.08.05.48.56 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 08 Jan 2014 05:48:56 -0800 (PST) Received-SPF: neutral (google.com: 209.85.128.182 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.182; Received: by mail-ve0-f182.google.com with SMTP id jy13so1250043veb.41 for ; Wed, 08 Jan 2014 05:48:56 -0800 (PST) X-Received: by 10.53.8.1 with SMTP id dg1mr2679058vdd.52.1389188936265; Wed, 08 Jan 2014 05:48:56 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.59.13.131 with SMTP id ey3csp226626ved; Wed, 8 Jan 2014 05:48:55 -0800 (PST) X-Received: by 10.180.108.162 with SMTP id hl2mr21400239wib.56.1389188935289; Wed, 08 Jan 2014 05:48:55 -0800 (PST) Received: from mail-wi0-f170.google.com (mail-wi0-f170.google.com [209.85.212.170]) by mx.google.com with ESMTPS id x3si5722098wjx.103.2014.01.08.05.48.54 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 08 Jan 2014 05:48:55 -0800 (PST) Received-SPF: neutral (google.com: 209.85.212.170 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) client-ip=209.85.212.170; Received: by mail-wi0-f170.google.com with SMTP id hq4so5341044wib.5 for ; Wed, 08 Jan 2014 05:48:54 -0800 (PST) X-Received: by 10.194.23.201 with SMTP id o9mr11125457wjf.67.1389188934841; Wed, 08 Jan 2014 05:48:54 -0800 (PST) Received: from localhost.localdomain (cpc15-aztw25-2-0-cust493.aztw.cable.virginm.net. [92.233.57.238]) by mx.google.com with ESMTPSA id j9sm48125217wjx.18.2014.01.08.05.48.53 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 08 Jan 2014 05:48:54 -0800 (PST) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: computersforpeace@gmail.com, angus.clark@st.com, Lee Jones Subject: [PATCH v4 20/37] mtd: st_spi_fsm: Provide a method to put the chip into 32bit addressing mode Date: Wed, 8 Jan 2014 13:47:03 +0000 Message-Id: <1389188840-14306-21-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1389188840-14306-1-git-send-email-lee.jones@linaro.org> References: <1389188840-14306-1-git-send-email-lee.jones@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.182 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Most Serial Flash chips support 24bit addressing as a default but more recent incarnations can support 32bit. Based on information provided though platform specific data and capabilities we can determine whether or not our current chip can. This patch provides a means to setup the FSM message sequence to put the chip into 32bit mode. Signed-off-by: Lee Jones --- drivers/mtd/devices/st_spi_fsm.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/mtd/devices/st_spi_fsm.c b/drivers/mtd/devices/st_spi_fsm.c index b21929b..e74513d 100644 --- a/drivers/mtd/devices/st_spi_fsm.c +++ b/drivers/mtd/devices/st_spi_fsm.c @@ -411,6 +411,8 @@ static struct flash_info flash_types[] = { { NULL, 0x000000, 0, 0, 0, 0, 0, NULL }, }; +static struct stfsm_seq stfsm_seq_en_32bit_addr;/* Dynamically populated */ + static struct stfsm_seq stfsm_seq_read_jedec = { .data_size = TRANSFER_SIZE(8), .seq_opc[0] = (SEQ_OPC_PADS_1 | @@ -554,6 +556,23 @@ static void stfsm_read_fifo(struct stfsm *fsm, uint32_t *buf, } } +static int stfsm_enter_32bit_addr(struct stfsm *fsm, int enter) +{ + struct stfsm_seq *seq = &stfsm_seq_en_32bit_addr; + uint32_t cmd = enter ? FLASH_CMD_EN4B_ADDR : FLASH_CMD_EX4B_ADDR; + + seq->seq_opc[0] = (SEQ_OPC_PADS_1 | + SEQ_OPC_CYCLES(8) | + SEQ_OPC_OPCODE(cmd) | + SEQ_OPC_CSDEASSERT); + + stfsm_load_seq(fsm, seq); + + stfsm_wait_seq(fsm); + + return 0; +} + /* * SoC reset on 'boot-from-spi' systems *