From patchwork Wed Jan 8 13:47:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 22969 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ve0-f197.google.com (mail-ve0-f197.google.com [209.85.128.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 72AB4202E2 for ; Wed, 8 Jan 2014 13:49:20 +0000 (UTC) Received: by mail-ve0-f197.google.com with SMTP id oz11sf2461101veb.4 for ; Wed, 08 Jan 2014 05:49:19 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=nJOvZpWP1m3wTh0pwSuU7hOvOoQKvXXBz80hjQ7aYMc=; b=RJV8JqHnTU9ul+zonLpxOBaO2spVFglV0QAYK6/tucT239hwnHT7SFl27pLEcTkoFC MlA5aocghWmhsqLg0/SKlyzDJOQe2VUPBCxOy49l1r1WutJCcjztI2ryBn80o6OTzLBG WMwBU0XwwoXjKJwrheQZx4TXEXJNfv4oTVHDxLieJ+FnLU9qk+vkPnYjw8ebSn6siGFO jHG/65cYjKzMEhufwA/Rf2wbUV21RYrFNxvQHMKjIMU1v2koCKm6X77P4BpyxBqRqPnC 50BOcOSX8S6bMz1ESiuoZdxCyER57Ekoiu4EArtQ1jIXulPF24AG1r6Jdm3gHyJOnlEF jxMg== X-Gm-Message-State: ALoCoQmuKbm+N4J0BWYdqGNuTEkPC3fX3ccCPsDJzEhpJeKik5eBzB+ZaqZVsZ831qvztPEd3wEi X-Received: by 10.58.154.5 with SMTP id vk5mr51023529veb.32.1389188959616; Wed, 08 Jan 2014 05:49:19 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.12.46 with SMTP id v14ls625887qeb.31.gmail; Wed, 08 Jan 2014 05:49:19 -0800 (PST) X-Received: by 10.58.255.195 with SMTP id as3mr3113937ved.50.1389188959526; Wed, 08 Jan 2014 05:49:19 -0800 (PST) Received: from mail-vb0-f49.google.com (mail-vb0-f49.google.com [209.85.212.49]) by mx.google.com with ESMTPS id si2si613176vdc.38.2014.01.08.05.49.19 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 08 Jan 2014 05:49:19 -0800 (PST) Received-SPF: neutral (google.com: 209.85.212.49 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.212.49; Received: by mail-vb0-f49.google.com with SMTP id x11so1143740vbb.22 for ; Wed, 08 Jan 2014 05:49:19 -0800 (PST) X-Received: by 10.52.241.103 with SMTP id wh7mr1622742vdc.85.1389188959393; Wed, 08 Jan 2014 05:49:19 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.59.13.131 with SMTP id ey3csp226659ved; Wed, 8 Jan 2014 05:49:18 -0800 (PST) X-Received: by 10.180.36.40 with SMTP id n8mr21347448wij.54.1389188955847; Wed, 08 Jan 2014 05:49:15 -0800 (PST) Received: from mail-wi0-f171.google.com (mail-wi0-f171.google.com [209.85.212.171]) by mx.google.com with ESMTPS id lm6si13853534wjc.0.2014.01.08.05.49.15 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 08 Jan 2014 05:49:15 -0800 (PST) Received-SPF: neutral (google.com: 209.85.212.171 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) client-ip=209.85.212.171; Received: by mail-wi0-f171.google.com with SMTP id bz8so5529343wib.10 for ; Wed, 08 Jan 2014 05:49:15 -0800 (PST) X-Received: by 10.180.73.230 with SMTP id o6mr21199097wiv.61.1389188955314; Wed, 08 Jan 2014 05:49:15 -0800 (PST) Received: from localhost.localdomain (cpc15-aztw25-2-0-cust493.aztw.cable.virginm.net. [92.233.57.238]) by mx.google.com with ESMTPSA id j9sm48125217wjx.18.2014.01.08.05.49.13 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 08 Jan 2014 05:49:14 -0800 (PST) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: computersforpeace@gmail.com, angus.clark@st.com, Lee Jones Subject: [PATCH v4 33/37] mtd: st_spi_fsm: Supply the MX25xxx chip specific configuration call-back Date: Wed, 8 Jan 2014 13:47:16 +0000 Message-Id: <1389188840-14306-34-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1389188840-14306-1-git-send-email-lee.jones@linaro.org> References: <1389188840-14306-1-git-send-email-lee.jones@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.49 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Signed-off-by: Lee Jones --- drivers/mtd/devices/st_spi_fsm.c | 82 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 81 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/devices/st_spi_fsm.c b/drivers/mtd/devices/st_spi_fsm.c index 1b0fa67..92071fa 100644 --- a/drivers/mtd/devices/st_spi_fsm.c +++ b/drivers/mtd/devices/st_spi_fsm.c @@ -324,6 +324,7 @@ struct flash_info { }; static int stfsm_n25q_config(struct stfsm *fsm); +static int stfsm_mx25_config(struct stfsm *fsm); static struct flash_info flash_types[] = { /* @@ -355,7 +356,8 @@ static struct flash_info flash_types[] = { FLASH_FLAG_SE_4K | \ FLASH_FLAG_SE_32K) { "mx25l25635e", 0xc22019, 0, 64*1024, 512, - (MX25_FLAG | FLASH_FLAG_32BIT_ADDR | FLASH_FLAG_RESET), 70, NULL } + (MX25_FLAG | FLASH_FLAG_32BIT_ADDR | FLASH_FLAG_RESET), 70, + stfsm_mx25_config }, #define N25Q_FLAG (FLASH_FLAG_READ_WRITE | \ FLASH_FLAG_READ_FAST | \ @@ -507,6 +509,31 @@ static struct seq_rw_config n25q_read4_configs[] = { {0x00, 0, 0, 0, 0, 0x00, 0, 0}, }; +/* + * [MX25xxx] Configuration + */ +#define MX25_STATUS_QE (0x1 << 6) + +static int stfsm_mx25_en_32bit_addr_seq(struct stfsm_seq *seq) +{ + seq->seq_opc[0] = (SEQ_OPC_PADS_1 | + SEQ_OPC_CYCLES(8) | + SEQ_OPC_OPCODE(FLASH_CMD_EN4B_ADDR) | + SEQ_OPC_CSDEASSERT); + + seq->seq[0] = STFSM_INST_CMD1; + seq->seq[1] = STFSM_INST_WAIT; + seq->seq[2] = STFSM_INST_STOP; + + seq->seq_cfg = (SEQ_CFG_PADS_1 | + SEQ_CFG_ERASE | + SEQ_CFG_READNOTWRITE | + SEQ_CFG_CSDEASSERT | + SEQ_CFG_STARTSEQ); + + return 0; +} + static struct stfsm_seq stfsm_seq_read; /* Dynamically populated */ static struct stfsm_seq stfsm_seq_write; /* Dynamically populated */ static struct stfsm_seq stfsm_seq_en_32bit_addr;/* Dynamically populated */ @@ -1033,6 +1060,59 @@ static int stfsm_prepare_rwe_seqs_default(struct stfsm *fsm) return 0; } +static int stfsm_mx25_config(struct stfsm *fsm) +{ + uint32_t flags = fsm->info->flags; + uint32_t data_pads; + uint8_t sta; + int ret; + bool soc_reset; + + /* + * Use default READ/WRITE sequences + */ + ret = stfsm_prepare_rwe_seqs_default(fsm); + if (ret) + return ret; + + /* + * Configure 32-bit Address Support + */ + if (flags & FLASH_FLAG_32BIT_ADDR) { + /* Configure 'enter_32bitaddr' FSM sequence */ + stfsm_mx25_en_32bit_addr_seq(&stfsm_seq_en_32bit_addr); + + soc_reset = stfsm_can_handle_soc_reset(fsm); + if (soc_reset || !fsm->booted_from_spi) { + /* If we can handle SoC resets, we enable 32-bit address + * mode pervasively */ + stfsm_enter_32bit_addr(fsm, 1); + + } else { + /* Else, enable/disable 32-bit addressing before/after + * each operation */ + fsm->configuration = (CFG_READ_TOGGLE_32BIT_ADDR | + CFG_WRITE_TOGGLE_32BIT_ADDR | + CFG_ERASESEC_TOGGLE_32BIT_ADDR); + /* It seems a small delay is required after exiting + * 32-bit mode following a write operation. The issue + * is under investigation. + */ + fsm->configuration |= CFG_WRITE_EX_32BIT_ADDR_DELAY; + } + } + + /* For QUAD mode, set 'QE' STATUS bit */ + data_pads = ((stfsm_seq_read.seq_cfg >> 16) & 0x3) + 1; + if (data_pads == 4) { + stfsm_read_status(fsm, FLASH_CMD_RDSR, &sta); + sta |= MX25_STATUS_QE; + stfsm_write_status(fsm, sta, 1); + } + + return 0; +} + static int stfsm_n25q_config(struct stfsm *fsm) { uint32_t flags = fsm->info->flags;