From patchwork Tue Feb 4 19:52:26 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 24139 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oa0-f71.google.com (mail-oa0-f71.google.com [209.85.219.71]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id BC952202FA for ; Tue, 4 Feb 2014 19:53:16 +0000 (UTC) Received: by mail-oa0-f71.google.com with SMTP id g12sf40105314oah.2 for ; Tue, 04 Feb 2014 11:53:15 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=XCGOekgrEmExexIfvziQ5QRVPr3liMGJjdRMbr4zfE0=; b=nNV7+P2fyowoM0QkBjgTEYU7LGQqfq8+WlrYkBYRfWJ2e5Fa9PRankGeoCs97kqZLt HJ9ukGEoXW7svSchfFH4g8khG+kR9Xh01VmDo0GbouzBF+edlUTk6VH1kXSSp9hHu/aa ADUK7nqYPvgIY7bAx9jVlKuQHgBuTiuxj9n0yayUBX5ZRR3VvrFufyfCkzWwhRed3MTX Ztg6i6k6FHBaJ0rN+vVyRcSR8TyK+P5TcD+PPnMt3BSzGZsRQphY/BqiZ4h7xoPtBu+0 2j0+C8hSyEkRk82/Q7zs7nS9JY71Y0W5a4SDh2erekji+VjoeKWvF5heQJ3rRleK383b O0cg== X-Gm-Message-State: ALoCoQklxYuW0HhXULsZNbM1NFhihKmJY9VLFdd7HkJH2LNCd68/O8XNxXLitrHrszQWMZxe0Gda X-Received: by 10.182.213.5 with SMTP id no5mr16758580obc.15.1391543595832; Tue, 04 Feb 2014 11:53:15 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.102.49 with SMTP id v46ls2462086qge.6.gmail; Tue, 04 Feb 2014 11:53:15 -0800 (PST) X-Received: by 10.52.171.39 with SMTP id ar7mr24732718vdc.5.1391543595715; Tue, 04 Feb 2014 11:53:15 -0800 (PST) Received: from mail-ve0-f178.google.com (mail-ve0-f178.google.com [209.85.128.178]) by mx.google.com with ESMTPS id xw5si8610665vec.122.2014.02.04.11.53.15 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 04 Feb 2014 11:53:15 -0800 (PST) Received-SPF: neutral (google.com: 209.85.128.178 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.178; Received: by mail-ve0-f178.google.com with SMTP id oy12so6322597veb.23 for ; Tue, 04 Feb 2014 11:53:15 -0800 (PST) X-Received: by 10.52.110.201 with SMTP id ic9mr28663682vdb.22.1391543595605; Tue, 04 Feb 2014 11:53:15 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp270700vcz; Tue, 4 Feb 2014 11:53:14 -0800 (PST) X-Received: by 10.194.178.135 with SMTP id cy7mr29948743wjc.21.1391543594523; Tue, 04 Feb 2014 11:53:14 -0800 (PST) Received: from mail-we0-f169.google.com (mail-we0-f169.google.com [74.125.82.169]) by mx.google.com with ESMTPS id u4si13175983wjq.117.2014.02.04.11.53.14 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 04 Feb 2014 11:53:14 -0800 (PST) Received-SPF: neutral (google.com: 74.125.82.169 is neither permitted nor denied by best guess record for domain of linus.walleij@linaro.org) client-ip=74.125.82.169; Received: by mail-we0-f169.google.com with SMTP id t61so4756252wes.0 for ; Tue, 04 Feb 2014 11:53:14 -0800 (PST) X-Received: by 10.180.38.41 with SMTP id d9mr14113006wik.9.1391543593981; Tue, 04 Feb 2014 11:53:13 -0800 (PST) Received: from localhost.localdomain ([85.235.11.236]) by mx.google.com with ESMTPSA id fb8sm38716314wic.3.2014.02.04.11.53.12 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 04 Feb 2014 11:53:13 -0800 (PST) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Patrice Chotard , Lee Jones Subject: [PATCH 10/10] ARM: ux500: move last AB8505 set-up to DT Date: Tue, 4 Feb 2014 20:52:26 +0100 Message-Id: <1391543546-11158-10-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.8.5.3 In-Reply-To: <1391543546-11158-1-git-send-email-linus.walleij@linaro.org> References: <1391543546-11158-1-git-send-email-linus.walleij@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: linus.walleij@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.178 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This moves the set-up of the HREF500 with its AB8505 ASIC to a device tree include. Since there is not yet any device tree for this board the DTSI is currently unused. After this delete the board file for pins for good and migration of pins to the device tree is complete. Cc: Patrice Chotard Cc: Lee Jones Signed-off-by: Linus Walleij --- arch/arm/boot/dts/ste-href-ab8505.dtsi | 240 ++++++++++++++++++++++++++++++++ arch/arm/mach-ux500/Makefile | 1 - arch/arm/mach-ux500/board-mop500-pins.c | 93 ------------- arch/arm/mach-ux500/board-mop500.h | 2 - arch/arm/mach-ux500/cpu-db8500.c | 3 - 5 files changed, 240 insertions(+), 99 deletions(-) create mode 100644 arch/arm/boot/dts/ste-href-ab8505.dtsi delete mode 100644 arch/arm/mach-ux500/board-mop500-pins.c diff --git a/arch/arm/boot/dts/ste-href-ab8505.dtsi b/arch/arm/boot/dts/ste-href-ab8505.dtsi new file mode 100644 index 000000000000..6006d62086a2 --- /dev/null +++ b/arch/arm/boot/dts/ste-href-ab8505.dtsi @@ -0,0 +1,240 @@ +/* + * Copyright 2014 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/ { + soc { + prcmu@80157000 { + ab8505 { + ab8505-gpio { + /* Hog a few default settings */ + pinctrl-names = "default"; + pinctrl-0 = <&gpio2_default_mode>, + <&gpio10_default_mode>, + <&gpio11_default_mode>, + <&gpio13_default_mode>, + <&gpio34_default_mode>, + <&gpio50_default_mode>, + <&pwm_default_mode>, + <&adi2_default_mode>, + <&modsclsda_default_mode>, + <&resethw_default_mode>, + <&service_default_mode>; + + /* + * Pins 2, 10, 11, 13, 34 and 50 + * are muxed in as GPIO, and configured as INPUT PULL DOWN + */ + gpio2 { + gpio2_default_mode: gpio2_default { + default_mux { + ste,function = "gpio"; + ste,pins = "gpio2_a_1"; + }; + default_cfg { + ste,pins = "GPIO2_R5"; + input-enable; + bias-pull-down; + }; + }; + }; + gpio10 { + gpio10_default_mode: gpio10_default { + default_mux { + ste,function = "gpio"; + ste,pins = "gpio10_d_1"; + }; + default_cfg { + ste,pins = "GPIO10_B16"; + input-enable; + bias-pull-down; + }; + }; + }; + gpio11 { + gpio11_default_mode: gpio11_default { + default_mux { + ste,function = "gpio"; + ste,pins = "gpio11_d_1"; + }; + default_cfg { + ste,pins = "GPIO11_B17"; + input-enable; + bias-pull-down; + }; + }; + }; + gpio13 { + gpio13_default_mode: gpio13_default { + default_mux { + ste,function = "gpio"; + ste,pins = "gpio13_d_1"; + }; + default_cfg { + ste,pins = "GPIO13_D17"; + input-enable; + bias-disable; + }; + }; + }; + gpio34 { + gpio34_default_mode: gpio34_default { + default_mux { + ste,function = "gpio"; + ste,pins = "gpio34_a_1"; + }; + default_cfg { + ste,pins = "GPIO34_H14"; + input-enable; + bias-pull-down; + }; + }; + }; + gpio50 { + gpio50_default_mode: gpio50_default { + default_mux { + ste,function = "gpio"; + ste,pins = "gpio50_d_1"; + }; + default_cfg { + ste,pins = "GPIO50_L4"; + input-enable; + bias-disable; + }; + }; + }; + /* This sets up the PWM pin 14 */ + pwm { + pwm_default_mode: pwm_default { + default_mux { + ste,function = "pwmout"; + ste,pins = "pwmout1_d_1"; + }; + default_cfg { + ste,pins = "GPIO14_C16"; + input-enable; + bias-pull-down; + }; + }; + }; + /* This sets up audio interface 2 */ + adi2 { + adi2_default_mode: adi2_default { + default_mux { + ste,function = "adi2"; + ste,pins = "adi2_d_1"; + }; + default_cfg { + ste,pins = "GPIO17_P2", + "GPIO18_N3", + "GPIO19_T1", + "GPIO20_P3"; + input-enable; + bias-pull-down; + }; + }; + }; + /* Modem I2C setup (SCL and SDA pins) */ + modsclsda { + modsclsda_default_mode: modsclsda_default { + default_mux { + ste,function = "modsclsda"; + ste,pins = "modsclsda_d_1"; + }; + default_cfg { + ste,pins = "GPIO40_J15", + "GPIO41_J14"; + input-enable; + bias-pull-down; + }; + }; + }; + resethw { + resethw_default_mode: resethw_default { + default_mux { + ste,function = "resethw"; + ste,pins = "resethw_d_1"; + }; + default_cfg { + ste,pins = "GPIO52_D16"; + input-enable; + bias-pull-down; + }; + }; + }; + service { + service_default_mode: service_default { + default_mux { + ste,function = "service"; + ste,pins = "service_d_1"; + }; + default_cfg { + ste,pins = "GPIO53_D15"; + input-enable; + bias-pull-down; + }; + }; + }; + /* + * Clock output pins associated with regulators. + */ + sysclkreq2 { + sysclkreq2_default_mode: sysclkreq2_default { + default_mux { + ste,function = "sysclkreq"; + ste,pins = "sysclkreq2_d_1"; + }; + default_cfg { + ste,pins = "GPIO1_N4"; + input-enable; + bias-disable; + }; + }; + sysclkreq2_sleep_mode: sysclkreq2_sleep { + default_mux { + ste,function = "gpio"; + ste,pins = "gpio1_a_1"; + }; + default_cfg { + ste,pins = "GPIO1_N4"; + input-enable; + bias-pull-down; + }; + }; + }; + sysclkreq4 { + sysclkreq4_default_mode: sysclkreq4_default { + default_mux { + ste,function = "sysclkreq"; + ste,pins = "sysclkreq4_d_1"; + }; + default_cfg { + ste,pins = "GPIO3_P5"; + input-enable; + bias-disable; + }; + }; + sysclkreq4_sleep_mode: sysclkreq4_sleep { + default_mux { + ste,function = "gpio"; + ste,pins = "gpio3_a_1"; + }; + default_cfg { + ste,pins = "GPIO3_P5"; + input-enable; + bias-pull-down; + }; + }; + }; + }; + }; + }; + }; +}; diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile index d05ba759da30..de544aabf292 100644 --- a/arch/arm/mach-ux500/Makefile +++ b/arch/arm/mach-ux500/Makefile @@ -7,7 +7,6 @@ obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o obj-$(CONFIG_MACH_MOP500) += board-mop500-sdi.o \ board-mop500-regulators.o \ - board-mop500-pins.o \ board-mop500-audio.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c deleted file mode 100644 index 1597ff7538e3..000000000000 --- a/arch/arm/mach-ux500/board-mop500-pins.c +++ /dev/null @@ -1,93 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * License terms: GNU General Public License (GPL) version 2 - */ - -#include -#include -#include -#include -#include -#include - -#include - -#include "board-mop500.h" - -/* These simply sets bias for pins */ -#define BIAS(a,b) static unsigned long a[] = { b } - -BIAS(abx500_in_pd, PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_DOWN, 1)); -BIAS(abx500_in_nopull, PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_DOWN, 0)); - -#define AB8505_MUX_HOG(group, func) \ - PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-ab8505.0", group, func) -#define AB8505_PIN_HOG(pin, conf) \ - PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-ab8505.0", pin, abx500_##conf) - -#define AB8505_MUX_STATE(group, func, dev, state) \ - PIN_MAP_MUX_GROUP(dev, state, "pinctrl-ab8505.0", group, func) -#define AB8505_PIN_STATE(pin, conf, dev, state) \ - PIN_MAP_CONFIGS_PIN(dev, state, "pinctrl-ab8505.0", pin, abx500_##conf) - -static struct pinctrl_map __initdata ab8505_pinmap[] = { - /* Sysclkreq2 */ - AB8505_MUX_STATE("sysclkreq2_d_1", "sysclkreq", "regulator.36", PINCTRL_STATE_DEFAULT), - AB8505_PIN_STATE("GPIO1_N4", in_nopull, "regulator.36", PINCTRL_STATE_DEFAULT), - /* sysclkreq2 disable, mux in gpio configured in input pulldown */ - AB8505_MUX_STATE("gpio1_a_1", "gpio", "regulator.36", PINCTRL_STATE_SLEEP), - AB8505_PIN_STATE("GPIO1_N4", in_pd, "regulator.36", PINCTRL_STATE_SLEEP), - - /* pins 2 is muxed in GPIO, configured in INPUT PULL DOWN */ - AB8505_MUX_HOG("gpio2_a_1", "gpio"), - AB8505_PIN_HOG("GPIO2_R5", in_pd), - - /* Sysclkreq4 */ - AB8505_MUX_STATE("sysclkreq4_d_1", "sysclkreq", "regulator.37", PINCTRL_STATE_DEFAULT), - AB8505_PIN_STATE("GPIO3_P5", in_nopull, "regulator.37", PINCTRL_STATE_DEFAULT), - /* sysclkreq4 disable, mux in gpio configured in input pulldown */ - AB8505_MUX_STATE("gpio3_a_1", "gpio", "regulator.37", PINCTRL_STATE_SLEEP), - AB8505_PIN_STATE("GPIO3_P5", in_pd, "regulator.37", PINCTRL_STATE_SLEEP), - - AB8505_MUX_HOG("gpio10_d_1", "gpio"), - AB8505_PIN_HOG("GPIO10_B16", in_pd), - - AB8505_MUX_HOG("gpio11_d_1", "gpio"), - AB8505_PIN_HOG("GPIO11_B17", in_pd), - - AB8505_MUX_HOG("gpio13_d_1", "gpio"), - AB8505_PIN_HOG("GPIO13_D17", in_nopull), - - AB8505_MUX_HOG("pwmout1_d_1", "pwmout"), - AB8505_PIN_HOG("GPIO14_C16", in_pd), - - AB8505_MUX_HOG("adi2_d_1", "adi2"), - AB8505_PIN_HOG("GPIO17_P2", in_pd), - AB8505_PIN_HOG("GPIO18_N3", in_pd), - AB8505_PIN_HOG("GPIO19_T1", in_pd), - AB8505_PIN_HOG("GPIO20_P3", in_pd), - - AB8505_MUX_HOG("gpio34_a_1", "gpio"), - AB8505_PIN_HOG("GPIO34_H14", in_pd), - - AB8505_MUX_HOG("modsclsda_d_1", "modsclsda"), - AB8505_PIN_HOG("GPIO40_J15", in_pd), - AB8505_PIN_HOG("GPIO41_J14", in_pd), - - AB8505_MUX_HOG("gpio50_d_1", "gpio"), - AB8505_PIN_HOG("GPIO50_L4", in_nopull), - - AB8505_MUX_HOG("resethw_d_1", "resethw"), - AB8505_PIN_HOG("GPIO52_D16", in_pd), - - AB8505_MUX_HOG("service_d_1", "service"), - AB8505_PIN_HOG("GPIO53_D15", in_pd), -}; - -void __init mop500_pinmaps_init(void) -{ - if (machine_is_u8520()) - pinctrl_register_mappings(ab8505_pinmap, - ARRAY_SIZE(ab8505_pinmap)); -} diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h index 320517e17ac9..bb408b8f48de 100644 --- a/arch/arm/mach-ux500/board-mop500.h +++ b/arch/arm/mach-ux500/board-mop500.h @@ -88,6 +88,4 @@ extern struct msp_i2s_platform_data msp1_platform_data; extern struct msp_i2s_platform_data msp2_platform_data; extern struct msp_i2s_platform_data msp3_platform_data; -void __init mop500_pinmaps_init(void); - #endif diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index 2e52fcba57bd..180b3c59be36 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c @@ -191,9 +191,6 @@ static void __init u8500_init_machine(void) { struct device *parent = db8500_soc_device_init(); - /* Pinmaps must be in place before devices register */ - if (of_machine_is_compatible("st-ericsson,mop500")) - mop500_pinmaps_init(); /* automatically probe child nodes of dbx5x0 devices */ if (of_machine_is_compatible("st-ericsson,u8540")) of_platform_populate(NULL, u8500_local_bus_nodes,