From patchwork Fri Feb 14 11:23:53 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 24625 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ie0-f198.google.com (mail-ie0-f198.google.com [209.85.223.198]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id E4AC5202B2 for ; Fri, 14 Feb 2014 11:24:13 +0000 (UTC) Received: by mail-ie0-f198.google.com with SMTP id at1sf8733303iec.9 for ; Fri, 14 Feb 2014 03:24:13 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=JFX38gr0GBLWNkBVGXOd0tyWUtldQI1uJ6BJ1tr+0Ak=; b=Di+Y13RZSZ2rYe+DdKsGY4+7gSHd76SIhBV131WhofmX94BZN0T7ABvy66UiQsvvaZ 9O/lczkQlD6ttkyMj8VlQx4NIPr+WtSpX0ci3jTI2+y5k/vUMleYxwoXsecuiyj7oOmw ZxuBCNxy1evEocW5B52ofOtkU1IFaAXoal6rMh7SkWqe73Dsr1KZRIrHtBebKnRgw9Dv WztN1PTKweRwDbbHMPgfQ3PasOr58v+eOBzDbcoHJ5+YLUlEpQOQLJG2USQuZAhMyKyU kRGOLNOEFDyfCOLWKM/4mt+j+WY+nm18B1fgJR8sZ7gst3N2CvLrM0eEnEHKPWP9NhWC YnwA== X-Gm-Message-State: ALoCoQl65+6d1KgzHUC0yi+UZ55KUXqiOJiIz9/43OPvpLphXGQW0kJPztzmrUeMx4cefLirSLQU X-Received: by 10.182.186.73 with SMTP id fi9mr2867417obc.48.1392377053146; Fri, 14 Feb 2014 03:24:13 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.88.203 with SMTP id t69ls41797qgd.87.gmail; Fri, 14 Feb 2014 03:24:13 -0800 (PST) X-Received: by 10.221.26.10 with SMTP id rk10mr5123824vcb.0.1392377053067; Fri, 14 Feb 2014 03:24:13 -0800 (PST) Received: from mail-vc0-f171.google.com (mail-vc0-f171.google.com [209.85.220.171]) by mx.google.com with ESMTPS id rb4si1811810vec.60.2014.02.14.03.24.11 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 14 Feb 2014 03:24:11 -0800 (PST) Received-SPF: neutral (google.com: 209.85.220.171 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.171; Received: by mail-vc0-f171.google.com with SMTP id le5so9405410vcb.30 for ; Fri, 14 Feb 2014 03:24:11 -0800 (PST) X-Received: by 10.52.27.9 with SMTP id p9mr768969vdg.28.1392377051163; Fri, 14 Feb 2014 03:24:11 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp101091vcz; Fri, 14 Feb 2014 03:24:10 -0800 (PST) X-Received: by 10.195.13.17 with SMTP id eu17mr5569444wjd.24.1392377049724; Fri, 14 Feb 2014 03:24:09 -0800 (PST) Received: from mail-wi0-f176.google.com (mail-wi0-f176.google.com [209.85.212.176]) by mx.google.com with ESMTPS id gf2si3477211wjb.49.2014.02.14.03.24.09 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 14 Feb 2014 03:24:09 -0800 (PST) Received-SPF: neutral (google.com: 209.85.212.176 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) client-ip=209.85.212.176; Received: by mail-wi0-f176.google.com with SMTP id hi5so357992wib.3 for ; Fri, 14 Feb 2014 03:24:09 -0800 (PST) X-Received: by 10.180.77.200 with SMTP id u8mr1790669wiw.48.1392377049180; Fri, 14 Feb 2014 03:24:09 -0800 (PST) Received: from localhost.localdomain ([80.76.198.141]) by mx.google.com with ESMTPSA id gt6sm3601775wib.8.2014.02.14.03.24.06 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 14 Feb 2014 03:24:08 -0800 (PST) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: alexandre.torgue@st.com, Lee Jones , devicetree@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH 1/4] phy: miphy365x: Add Device Tree bindings for the MiPHY365x Date: Fri, 14 Feb 2014 11:23:53 +0000 Message-Id: <1392377036-12816-1-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.3.2 X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.171 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The MiPHY365x is a Generic PHY which can serve various SATA or PCIe devices. It has 2 ports which it can use for either; both SATA, both PCIe or one of each in any configuration. Cc: devicetree@vger.kernel.org Cc: Srinivas Kandagatla Signed-off-by: Lee Jones --- .../devicetree/bindings/phy/phy-miphy365x.txt | 54 ++++++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/phy-miphy365x.txt diff --git a/Documentation/devicetree/bindings/phy/phy-miphy365x.txt b/Documentation/devicetree/bindings/phy/phy-miphy365x.txt new file mode 100644 index 0000000..96f269f --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-miphy365x.txt @@ -0,0 +1,54 @@ +STMicroelectronics STi MIPHY365x PHY binding +============================================ + +This binding describes a miphy device that is used to control PHY hardware +for SATA and PCIe. + +Required properties: +- compatible: Should be "st,miphy365x-phy" +- #phy-cells: Should be 2 (See second example) + First cell is the port number; MIPHY_PORT_{0,1} + Second cell is device type; MIPHY_TYPE_{SATA,PCI} +- reg: Address and length of the register set for the device +- reg-names: The names of the register addresses corresponding to the + registers filled in "reg" + Options are; sata{0,1} and pcie{0,1} (See first example) +- st,syscfg : Should be a phandle of the system configuration register group + which contain the SATA, PCIe mode setting bits + +Optional properties: +- st,sata-gen : Generation of locally attached SATA IP. Expected values + are {1,2,3). If not supplied generation 1 hardware will + be expected +- st,pcie-tx-pol-inv : Bool property to invert the polarity PCIe Tx (Txn/Txp) +- st,sata-tx-pol-inv : Bool property to invert the polarity SATA Tx (Txn/Txp) + +Example: + + miphy365x_phy: miphy365x@0 { + compatible = "st,miphy365x-phy"; + #phy-cells = <2>; + reg = <0xfe382000 0x100>, + <0xfe38a000 0x100>, + <0xfe394000 0x100>, + <0xfe804000 0x100>; + reg-names = "sata0", "sata1", "pcie0", "pcie1"; + st,syscfg= <&syscfg_rear>; + }; + +Specifying phy control of devices +================================= + +Device nodes should specify the configuration required in their "phys" +property, containing a phandle to the miphy device node, a port number +and a device type. + +Example: + +#include + + sata0: sata@fe380000 { + ... + phys = <&miphy365x_phy MIPHY_PORT_0 MIPHY_TYPE_SATA>; + ... + };