From patchwork Thu Mar 20 09:20:44 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 26645 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oa0-f71.google.com (mail-oa0-f71.google.com [209.85.219.71]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id C9FDD202E0 for ; Thu, 20 Mar 2014 09:21:46 +0000 (UTC) Received: by mail-oa0-f71.google.com with SMTP id j17sf2392631oag.10 for ; Thu, 20 Mar 2014 02:21:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=KmCKmWz7dz8t/+lLL4p/quGNFOg+GIygO/wMZVm5ERs=; b=GiXkQtoQyOe4R5wDIkkcgzcpPd6HYJXurwYlETRVG0aRpoftipmpAuzMuhDzjPSjsz n3Of9fsYtyil7MzCuPT2wyPh4BUk8hWo+ScM0Yi9Mv5Sdf6oG4IWtJnp8lddkMaDzn09 5pO5tv02eAhKbKaC9Jo+z3iZu+UEQA7NOua8fcfq57AiExxgB8xMLOX8pmkR/R+8gPF4 NFbY3fb2Yl+Ueb1Vk1IZUaxjuyYi+aw7kBrd/1zIi2JGezcA4EmzzuDpvxly7J/pNdgF N3pOM+h2ca1puULgoN4uJzBGrUeEIkdFj/102QIfPztq+8X3+vIhAGMulChwMaMi+LVn YNhw== X-Gm-Message-State: ALoCoQn9burMdmwpqD5j82vXMUbTz7EVutcIyFni2IFS2RYPp0/Ft026vAbgTUrEozjO4LSHQCTx X-Received: by 10.50.2.65 with SMTP id 1mr840325igs.1.1395307306283; Thu, 20 Mar 2014 02:21:46 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.39.133 with SMTP id v5ls144467qgv.23.gmail; Thu, 20 Mar 2014 02:21:46 -0700 (PDT) X-Received: by 10.58.134.101 with SMTP id pj5mr3265169veb.38.1395307306168; Thu, 20 Mar 2014 02:21:46 -0700 (PDT) Received: from mail-vc0-f172.google.com (mail-vc0-f172.google.com [209.85.220.172]) by mx.google.com with ESMTPS id ys8si297843veb.52.2014.03.20.02.21.46 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 20 Mar 2014 02:21:46 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.220.172 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.172; Received: by mail-vc0-f172.google.com with SMTP id la4so596518vcb.17 for ; Thu, 20 Mar 2014 02:21:46 -0700 (PDT) X-Received: by 10.52.134.202 with SMTP id pm10mr33074vdb.55.1395307306084; Thu, 20 Mar 2014 02:21:46 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.78.9 with SMTP id i9csp372518vck; Thu, 20 Mar 2014 02:21:45 -0700 (PDT) X-Received: by 10.180.19.138 with SMTP id f10mr23293101wie.11.1395307305014; Thu, 20 Mar 2014 02:21:45 -0700 (PDT) Received: from mail-we0-f178.google.com (mail-we0-f178.google.com [74.125.82.178]) by mx.google.com with ESMTPS id dl2si867034wjb.2.2014.03.20.02.21.44 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 20 Mar 2014 02:21:45 -0700 (PDT) Received-SPF: neutral (google.com: 74.125.82.178 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) client-ip=74.125.82.178; Received: by mail-we0-f178.google.com with SMTP id u56so367861wes.9 for ; Thu, 20 Mar 2014 02:21:44 -0700 (PDT) X-Received: by 10.194.175.202 with SMTP id cc10mr6660180wjc.48.1395307304363; Thu, 20 Mar 2014 02:21:44 -0700 (PDT) Received: from lee--X1.home (host109-148-116-196.range109-148.btcentralplus.com. [109.148.116.196]) by mx.google.com with ESMTPSA id di9sm4735120wid.6.2014.03.20.02.21.42 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 20 Mar 2014 02:21:43 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, computersforpeace@gmail.com Cc: linux-mtd@lists.infradead.org, dwmw2@infradead.org, Angus.Clark@st.com, Lee Jones Subject: [PATCH v6 12/36] mtd: st_spi_fsm: Prepare the read/write FSM message sequence(s) Date: Thu, 20 Mar 2014 09:20:44 +0000 Message-Id: <1395307268-12721-13-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1395307268-12721-1-git-send-email-lee.jones@linaro.org> References: <1395307268-12721-1-git-send-email-lee.jones@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.172 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The FSM Serial Flash Controller is driven by issuing a standard set of register writes we call a message sequence. This patch supplies a method to prepare read/write FSM message sequence(s) based on chip capability and configuration. Acked-by Angus Clark Signed-off-by: Lee Jones --- drivers/mtd/devices/st_spi_fsm.c | 69 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/drivers/mtd/devices/st_spi_fsm.c b/drivers/mtd/devices/st_spi_fsm.c index 5a1b470..83cf9df 100644 --- a/drivers/mtd/devices/st_spi_fsm.c +++ b/drivers/mtd/devices/st_spi_fsm.c @@ -489,6 +489,75 @@ stfsm_search_seq_rw_configs(struct stfsm *fsm, return NULL; } +/* Prepare a READ/WRITE sequence according to configuration parameters */ +static void stfsm_prepare_rw_seq(struct stfsm *fsm, + struct stfsm_seq *seq, + struct seq_rw_config *cfg) +{ + int addr1_cycles, addr2_cycles; + int i = 0; + + memset(seq, 0, sizeof(*seq)); + + /* Add READ/WRITE OPC */ + seq->seq_opc[i++] = (SEQ_OPC_PADS_1 | + SEQ_OPC_CYCLES(8) | + SEQ_OPC_OPCODE(cfg->cmd)); + + /* Add WREN OPC for a WRITE sequence */ + if (cfg->write) + seq->seq_opc[i++] = (SEQ_OPC_PADS_1 | + SEQ_OPC_CYCLES(8) | + SEQ_OPC_OPCODE(FLASH_CMD_WREN) | + SEQ_OPC_CSDEASSERT); + + /* Address configuration (24 or 32-bit addresses) */ + addr1_cycles = (fsm->info->flags & FLASH_FLAG_32BIT_ADDR) ? 16 : 8; + addr1_cycles /= cfg->addr_pads; + addr2_cycles = 16 / cfg->addr_pads; + seq->addr_cfg = ((addr1_cycles & 0x3f) << 0 | /* ADD1 cycles */ + (cfg->addr_pads - 1) << 6 | /* ADD1 pads */ + (addr2_cycles & 0x3f) << 16 | /* ADD2 cycles */ + ((cfg->addr_pads - 1) << 22)); /* ADD2 pads */ + + /* Data/Sequence configuration */ + seq->seq_cfg = ((cfg->data_pads - 1) << 16 | + SEQ_CFG_STARTSEQ | + SEQ_CFG_CSDEASSERT); + if (!cfg->write) + seq->seq_cfg |= SEQ_CFG_READNOTWRITE; + + /* Mode configuration (no. of pads taken from addr cfg) */ + seq->mode = ((cfg->mode_data & 0xff) << 0 | /* data */ + (cfg->mode_cycles & 0x3f) << 16 | /* cycles */ + (cfg->addr_pads - 1) << 22); /* pads */ + + /* Dummy configuration (no. of pads taken from addr cfg) */ + seq->dummy = ((cfg->dummy_cycles & 0x3f) << 16 | /* cycles */ + (cfg->addr_pads - 1) << 22); /* pads */ + + + /* Instruction sequence */ + i = 0; + if (cfg->write) + seq->seq[i++] = STFSM_INST_CMD2; + + seq->seq[i++] = STFSM_INST_CMD1; + + seq->seq[i++] = STFSM_INST_ADD1; + seq->seq[i++] = STFSM_INST_ADD2; + + if (cfg->mode_cycles) + seq->seq[i++] = STFSM_INST_MODE; + + if (cfg->dummy_cycles) + seq->seq[i++] = STFSM_INST_DUMMY; + + seq->seq[i++] = + cfg->write ? STFSM_INST_DATA_WRITE : STFSM_INST_DATA_READ; + seq->seq[i++] = STFSM_INST_STOP; +} + static void stfsm_read_jedec(struct stfsm *fsm, uint8_t *const jedec) { const struct stfsm_seq *seq = &stfsm_seq_read_jedec;