From patchwork Thu Mar 20 09:20:50 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 26651 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-pd0-f200.google.com (mail-pd0-f200.google.com [209.85.192.200]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id DDBAC202E0 for ; Thu, 20 Mar 2014 09:21:59 +0000 (UTC) Received: by mail-pd0-f200.google.com with SMTP id p10sf1439126pdj.7 for ; Thu, 20 Mar 2014 02:21:59 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=bZtq1vapNkcmxNqn1bRpsSyfLQRdpHrqfbod/RpVJ08=; b=KPVpnFOOFMwVz/PqKsAJ/6YRJKD4joFeEavtBOFzfe95kTwV2+ZUtCdpzGLgM3NnvE 2gdWydsQBhgDF67D6PQzgdM+fy0Ain9Gx3qlky+FnsEQaDAqm2rhplNY0pXyvltPGFS6 p1j975kPMxCWEhAAh5zyl8S2TI4ap1NjQdnSI8SEP+Je2RTVEjuSyv+Brqg0Sr6C7/w1 rxo++JBr7XnJkDajXlKbWEXmOlpKb7o2fkSKIWazlWIywHpQj5rPYsbGLcB4Xd74XlO4 RLEO4GjXRZFA/P2GFsjQfYLkcj18DUWtqd9QrLpjW2grpflkNqcVqv5kSfphS85RFwAD WvlQ== X-Gm-Message-State: ALoCoQmLn3xEm4NXSIECLSNa3WCka9y6sqYIBVXLPZ8ApvOwK+1V/ZAQ0R4oel/oNI7HJ78YdtQR X-Received: by 10.68.197.73 with SMTP id is9mr17010722pbc.0.1395307319091; Thu, 20 Mar 2014 02:21:59 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.93.194 with SMTP id d60ls154823qge.22.gmail; Thu, 20 Mar 2014 02:21:58 -0700 (PDT) X-Received: by 10.221.29.137 with SMTP id ry9mr33447996vcb.6.1395307318953; Thu, 20 Mar 2014 02:21:58 -0700 (PDT) Received: from mail-ve0-f176.google.com (mail-ve0-f176.google.com [209.85.128.176]) by mx.google.com with ESMTPS id iz10si297661vec.60.2014.03.20.02.21.58 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 20 Mar 2014 02:21:58 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.128.176 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.176; Received: by mail-ve0-f176.google.com with SMTP id cz12so579647veb.7 for ; Thu, 20 Mar 2014 02:21:58 -0700 (PDT) X-Received: by 10.220.95.139 with SMTP id d11mr20399510vcn.21.1395307318879; Thu, 20 Mar 2014 02:21:58 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.78.9 with SMTP id i9csp372540vck; Thu, 20 Mar 2014 02:21:58 -0700 (PDT) X-Received: by 10.180.101.40 with SMTP id fd8mr23113932wib.1.1395307317109; Thu, 20 Mar 2014 02:21:57 -0700 (PDT) Received: from mail-we0-f179.google.com (mail-we0-f179.google.com [74.125.82.179]) by mx.google.com with ESMTPS id i5si857412wjx.40.2014.03.20.02.21.56 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 20 Mar 2014 02:21:57 -0700 (PDT) Received-SPF: neutral (google.com: 74.125.82.179 is neither permitted nor denied by best guess record for domain of lee.jones@linaro.org) client-ip=74.125.82.179; Received: by mail-we0-f179.google.com with SMTP id x48so357749wes.24 for ; Thu, 20 Mar 2014 02:21:56 -0700 (PDT) X-Received: by 10.180.205.130 with SMTP id lg2mr1645153wic.59.1395307316498; Thu, 20 Mar 2014 02:21:56 -0700 (PDT) Received: from lee--X1.home (host109-148-116-196.range109-148.btcentralplus.com. [109.148.116.196]) by mx.google.com with ESMTPSA id di9sm4735120wid.6.2014.03.20.02.21.54 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 20 Mar 2014 02:21:55 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, computersforpeace@gmail.com Cc: linux-mtd@lists.infradead.org, dwmw2@infradead.org, Angus.Clark@st.com, Lee Jones Subject: [PATCH v6 18/36] mtd: st_spi_fsm: Add a check to if the chip can handle an SoC reset Date: Thu, 20 Mar 2014 09:20:50 +0000 Message-Id: <1395307268-12721-19-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1395307268-12721-1-git-send-email-lee.jones@linaro.org> References: <1395307268-12721-1-git-send-email-lee.jones@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.176 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Based on information we can obtain though platform specific data and/or chip capabilities we are able to determine whether or not we can handle a SoC reset or not. To find out why this is important please read the comment provided in the patch. Acked-by Angus Clark Signed-off-by: Lee Jones --- drivers/mtd/devices/st_spi_fsm.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/drivers/mtd/devices/st_spi_fsm.c b/drivers/mtd/devices/st_spi_fsm.c index 3e13d57..7cc4425 100644 --- a/drivers/mtd/devices/st_spi_fsm.c +++ b/drivers/mtd/devices/st_spi_fsm.c @@ -210,6 +210,8 @@ struct stfsm { uint32_t fifo_dir_delay; bool booted_from_spi; + bool reset_signal; + bool reset_por; }; struct stfsm_seq { @@ -521,6 +523,40 @@ static void stfsm_read_fifo(struct stfsm *fsm, uint32_t *buf, } } +/* + * SoC reset on 'boot-from-spi' systems + * + * Certain modes of operation cause the Flash device to enter a particular state + * for a period of time (e.g. 'Erase Sector', 'Quad Enable', and 'Enter 32-bit + * Addr' commands). On boot-from-spi systems, it is important to consider what + * happens if a warm reset occurs during this period. The SPIBoot controller + * assumes that Flash device is in its default reset state, 24-bit address mode, + * and ready to accept commands. This can be achieved using some form of + * on-board logic/controller to force a device POR in response to a SoC-level + * reset or by making use of the device reset signal if available (limited + * number of devices only). + * + * Failure to take such precautions can cause problems following a warm reset. + * For some operations (e.g. ERASE), there is little that can be done. For + * other modes of operation (e.g. 32-bit addressing), options are often + * available that can help minimise the window in which a reset could cause a + * problem. + * + */ +static bool stfsm_can_handle_soc_reset(struct stfsm *fsm) +{ + /* Reset signal is available on the board and supported by the device */ + if (fsm->reset_signal && fsm->info->flags & FLASH_FLAG_RESET) + return true; + + /* Board-level logic forces a power-on-reset */ + if (fsm->reset_por) + return true; + + /* Reset is not properly handled and may result in failure to reboot */ + return false; +} + /* Configure 'addr_cfg' according to addressing mode */ static void stfsm_prepare_erasesec_seq(struct stfsm *fsm, struct stfsm_seq *seq) @@ -786,6 +822,10 @@ static void stfsm_fetch_platform_configs(struct platform_device *pdev) if (IS_ERR(regmap)) goto boot_device_fail; + fsm->reset_signal = of_property_read_bool(np, "st,reset-signal"); + + fsm->reset_por = of_property_read_bool(np, "st,reset-por"); + /* Where in the syscon the boot device information lives */ ret = of_property_read_u32(np, "st,boot-device-reg", &boot_device_reg); if (ret)