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[109.148.113.193]) by mx.google.com with ESMTPSA id r1sm2579129wia.5.2014.03.21.01.00.13 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 21 Mar 2014 01:00:15 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: lee.jones@linaro.org, kernel@stlinux.com, maxime.coquelin@st.com, patrice.chotard@st.com, srinivas.kandagatla@st.com Subject: [PATCH 1/2] ARM: STi: stih416: Add support for the FSM Serial Flash Controller Date: Fri, 21 Mar 2014 08:00:04 +0000 Message-Id: <1395388805-15840-1-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.3.2 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.172 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Here we add the necessary device nodes required for successful device probing and Pinctrl setup for the FSM when booting on an STiH416 (Orly2). Acked-by: Srinivas Kandagatla Acked-by Angus Clark Acked-by: Brian Norris Acked-by: Maxime Coquelin Signed-off-by: Lee Jones --- arch/arm/boot/dts/stih416-pinctrl.dtsi | 13 +++++++++++++ arch/arm/boot/dts/stih416.dtsi | 13 +++++++++++++ 2 files changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/stih416-pinctrl.dtsi b/arch/arm/boot/dts/stih416-pinctrl.dtsi index b29ff4b..81df8e7 100644 --- a/arch/arm/boot/dts/stih416-pinctrl.dtsi +++ b/arch/arm/boot/dts/stih416-pinctrl.dtsi @@ -210,6 +210,19 @@ }; }; }; + + fsm { + pinctrl_fsm: fsm { + st,pins { + spi-fsm-clk = <&PIO12 2 ALT1 OUT>; + spi-fsm-cs = <&PIO12 3 ALT1 OUT>; + spi-fsm-mosi = <&PIO12 4 ALT1 OUT>; + spi-fsm-miso = <&PIO12 5 ALT1 IN>; + spi-fsm-hol = <&PIO12 6 ALT1 OUT>; + spi-fsm-wp = <&PIO12 7 ALT1 OUT>; + }; + }; + }; }; pin-controller-rear { diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi index b7ab47b..1e24b9e 100644 --- a/arch/arm/boot/dts/stih416.dtsi +++ b/arch/arm/boot/dts/stih416.dtsi @@ -145,5 +145,18 @@ status = "disabled"; }; + + /* FSM */ + spifsm: spifsm@fe902000 { + compatible = "st,spi-fsm"; + reg = <0xfe902000 0x1000>; + pinctrl-0 = <&pinctrl_fsm>; + + st,syscfg = <&syscfg_rear>; + st,boot-device-reg = <0x958>; + st,boot-device-spi = <0x1a>; + + status = "disabled"; + }; }; };