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[209.132.180.67]) by mx.google.com with ESMTP id wh4si3861973pbc.348.2014.03.21.08.10.10; Fri, 21 Mar 2014 08:10:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760533AbaCUPKH (ORCPT + 4 others); Fri, 21 Mar 2014 11:10:07 -0400 Received: from mail-ie0-f169.google.com ([209.85.223.169]:44652 "EHLO mail-ie0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1760459AbaCUPKC (ORCPT ); Fri, 21 Mar 2014 11:10:02 -0400 Received: by mail-ie0-f169.google.com with SMTP id to1so2595885ieb.0 for ; Fri, 21 Mar 2014 08:10:02 -0700 (PDT) X-Received: by 10.50.57.17 with SMTP id e17mr3339587igq.13.1395414601923; Fri, 21 Mar 2014 08:10:01 -0700 (PDT) Received: from localhost.localdomain ([205.204.88.171]) by mx.google.com with ESMTPSA id sc8sm4042705igb.0.2014.03.21.08.09.47 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 21 Mar 2014 08:10:00 -0700 (PDT) From: Zhangfei Gao To: "David S. Miller" , linux@arm.linux.org.uk, arnd@arndb.de, f.fainelli@gmail.com, mark.rutland@arm.com, sergei.shtylyov@cogentembedded.com Cc: linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, Zhangfei Gao Subject: [PATCH 1/3] Documentation: add Device tree bindings for Hisilicon hip04 ethernet Date: Fri, 21 Mar 2014 23:09:28 +0800 Message-Id: <1395414570-25515-2-git-send-email-zhangfei.gao@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1395414570-25515-1-git-send-email-zhangfei.gao@linaro.org> References: <1395414570-25515-1-git-send-email-zhangfei.gao@linaro.org> Sender: netdev-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: netdev@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: zhangfei.gao@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.173 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This patch adds the Device Tree bindings for the Hisilicon hip04 Ethernet controller, including 100M / 1000M controller. Signed-off-by: Zhangfei Gao --- .../bindings/net/hisilicon-hip04-net.txt | 107 ++++++++++++++++++++ 1 file changed, 107 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/hisilicon-hip04-net.txt diff --git a/Documentation/devicetree/bindings/net/hisilicon-hip04-net.txt b/Documentation/devicetree/bindings/net/hisilicon-hip04-net.txt new file mode 100644 index 0000000..22838b2 --- /dev/null +++ b/Documentation/devicetree/bindings/net/hisilicon-hip04-net.txt @@ -0,0 +1,107 @@ +Hisilicon hip04 Ethernet Controller + +* Ethernet controller node + +Required properties: +- compatible: should be "hisilicon,hip04-mac". +- reg: address and length of the register set for the device. +- interrupts: interrupt for the device. +- port-handle: phandle, specifies a reference to a node representing + the connected port +- Inherets from ethernet common binding [1] +[1] Documentation/devicetree/bindings/net/ethernet.txt + + +* Ethernet ppe node: +Control rx & tx fifos of all ethernet controllers. +Have 2048 recv channels shared by all ethernet controllers, only if no overlap. +Each controller's start recv channel is alisa_id * RX_DESC_NUM. + +Required properties: +- #address-cells : Should be <1> +- #size-cells : Should be <0> +- compatible: "hisilicon,hip04-ppe" +- reg: address and length of the register set for the device. + +==Child node== + +Required properties: +- reg: port physical number, range from 0 to 0x1f + + +* MDIO bus node: + +Required properties: + +- compatible: should be "hisilicon,hip04-mdio", "ethernet-phy-ieee802.3-c22". +- Inherets from MDIO bus node binding [2] +[2] Documentation/devicetree/bindings/net/phy.txt + +Example: + aliases { + ethernet0 = &fe; + ethernet1 = &ge0; + ethernet2 = &ge8; + }; + + mdio { + compatible = "hisilicon,hip04-mdio", "ethernet-phy-ieee802.3-c22"; + reg = <0x28f1000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy@0 { + reg = <0>; + marvell,reg-init = <18 0x14 0 0x8001>; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + marvell,reg-init = <18 0x14 0 0x8001>; + }; + }; + + ppe: ppe@28c0000 { + compatible = "hisilicon,hip04-ppe"; + reg = <0x28c0000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; + + eth0_port: port@1f { + reg = <0x1f>; + }; + + eth1_port: port@0 { + reg = <0>; + }; + + eth2_port: port@8 { + reg = <8>; + }; + }; + + fe: ethernet@28b0000 { + compatible = "hisilicon,hip04-mac"; + reg = <0x28b0000 0x10000>; + interrupts = <0 413 4>; + phy-mode = "mii"; + port-handle = <ð0_port>; + }; + + ge0: ethernet@2800000 { + compatible = "hisilicon,hip04-mac"; + reg = <0x2800000 0x10000>; + interrupts = <0 402 4>; + phy-mode = "sgmii"; + port-handle = <ð1_port>; + phy-handle = <&phy0>; + }; + + ge8: ethernet@2880000 { + compatible = "hisilicon,hip04-mac"; + reg = <0x2880000 0x10000>; + interrupts = <0 410 4>; + phy-mode = "sgmii"; + port-handle = <ð2_port>; + phy-handle = <&phy1>; + };