From patchwork Fri May 2 15:20:34 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Salter X-Patchwork-Id: 29556 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ie0-f199.google.com (mail-ie0-f199.google.com [209.85.223.199]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id EB0C1202E7 for ; Fri, 2 May 2014 15:21:53 +0000 (UTC) Received: by mail-ie0-f199.google.com with SMTP id rl12sf24964308iec.10 for ; Fri, 02 May 2014 08:21:53 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=nbZBHf6reOFe3FyPWuh6Iw+UZXzmnhDOM9m+gSmEvHc=; b=hCWqOReUabLP6WYWotQpqOysmu0b5CTdVeI0WMdFDqiF3a0KmWSL8jBGNjmVfyvbPv M3mMulrnQBn/ZJX8WM5GljBUG783BPfGgKVYbEzc6A9rRZ7Gu8js0Byx5WRsQVBPO/Q1 fKWUE8RUiWNSbS41ncS/gwEL+Y8kfzUh+x3vXEZiuRoHwAKnrVEV0inJsZ3+K5CNZLvv DsBIcpoR89JcPTzojuzCazoEXgVGtgqRDjpRAZRqZFlz20ehbjA93WtyxZRIluzBNFCJ vwYHBj3Mm4eXgOBmntKf5QQGcbYwXczLkZFmv/GsNMRLyI6m0elztGiv5qXsCRjp+N8j iAZQ== X-Gm-Message-State: ALoCoQmxTcVu4soNUsi5VCitJ8HCMcTcQQl/mnYqPepmaDXOh4rztVMdoxIvIXehRvz3Ig8I7bOK X-Received: by 10.182.105.1 with SMTP id gi1mr9125572obb.6.1399044113361; Fri, 02 May 2014 08:21:53 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.106.34 with SMTP id d31ls283834qgf.49.gmail; Fri, 02 May 2014 08:21:53 -0700 (PDT) X-Received: by 10.58.88.8 with SMTP id bc8mr443684veb.39.1399044113217; Fri, 02 May 2014 08:21:53 -0700 (PDT) Received: from mail-vc0-f176.google.com (mail-vc0-f176.google.com [209.85.220.176]) by mx.google.com with ESMTPS id fn10si6758847vdc.117.2014.05.02.08.21.53 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 02 May 2014 08:21:53 -0700 (PDT) Received-SPF: none (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) client-ip=209.85.220.176; Received: by mail-vc0-f176.google.com with SMTP id lg15so2740031vcb.21 for ; Fri, 02 May 2014 08:21:53 -0700 (PDT) X-Received: by 10.53.1.69 with SMTP id be5mr11464256vdd.27.1399044113153; Fri, 02 May 2014 08:21:53 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.221.72 with SMTP id ib8csp110742vcb; Fri, 2 May 2014 08:21:52 -0700 (PDT) X-Received: by 10.43.106.137 with SMTP id du9mr2469239icc.93.1399044112496; Fri, 02 May 2014 08:21:52 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m10si1387777icu.97.2014.05.02.08.21.51; Fri, 02 May 2014 08:21:51 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752661AbaEBPVL (ORCPT + 28 others); Fri, 2 May 2014 11:21:11 -0400 Received: from mx1.redhat.com ([209.132.183.28]:52765 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751811AbaEBPVJ (ORCPT ); Fri, 2 May 2014 11:21:09 -0400 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id s42FKidw025778 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Fri, 2 May 2014 11:20:44 -0400 Received: from deneb.redhat.com (ovpn-113-147.phx2.redhat.com [10.3.113.147]) by int-mx02.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id s42FKhJP018333; Fri, 2 May 2014 11:20:44 -0400 From: Mark Salter To: Catalin Marinas , Will Deacon Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Mark Salter Subject: [PATCH 1/2] arm64: fix unnecessary tlb flushes Date: Fri, 2 May 2014 11:20:34 -0400 Message-Id: <1399044035-11274-2-git-send-email-msalter@redhat.com> In-Reply-To: <1399044035-11274-1-git-send-email-msalter@redhat.com> References: <1399044035-11274-1-git-send-email-msalter@redhat.com> X-Scanned-By: MIMEDefang 2.67 on 10.5.11.12 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: msalter@redhat.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The __cpu_flush_user_tlb_range() and __cpu_flush_user_tlb_range() functions loop through an address range by page to flush tlb entries. However, these functions assume a 4K page size. If the kernel is configured for 64k page sizes, these functions would execute the tlbi instruction 16 times per page rather than once. This patch uses the PAGE_SHIFT definition to ensure one tlb flush for any given page in the range. Signed-off-by: Mark Salter --- arch/arm64/mm/tlb.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/mm/tlb.S b/arch/arm64/mm/tlb.S index 19da91e..b818073 100644 --- a/arch/arm64/mm/tlb.S +++ b/arch/arm64/mm/tlb.S @@ -42,7 +42,7 @@ ENTRY(__cpu_flush_user_tlb_range) bfi x0, x3, #48, #16 // start VA and ASID bfi x1, x3, #48, #16 // end VA and ASID 1: tlbi vae1is, x0 // TLB invalidate by address and ASID - add x0, x0, #1 + add x0, x0, #(1 << (PAGE_SHIFT - 12)) cmp x0, x1 b.lo 1b dsb sy @@ -62,7 +62,7 @@ ENTRY(__cpu_flush_kern_tlb_range) lsr x0, x0, #12 // align address lsr x1, x1, #12 1: tlbi vaae1is, x0 // TLB invalidate by address - add x0, x0, #1 + add x0, x0, #(1 << (PAGE_SHIFT - 12)) cmp x0, x1 b.lo 1b dsb sy