From patchwork Tue Jun 17 17:04:32 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 32081 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-vc0-f199.google.com (mail-vc0-f199.google.com [209.85.220.199]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id C538B206A0 for ; Tue, 17 Jun 2014 17:07:07 +0000 (UTC) Received: by mail-vc0-f199.google.com with SMTP id ij19sf25919285vcb.2 for ; Tue, 17 Jun 2014 10:07:07 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:subject:date:message-id :in-reply-to:references:cc:precedence:list-id:list-unsubscribe :list-archive:list-post:list-help:list-subscribe:mime-version:sender :errors-to:x-original-sender:x-original-authentication-results :mailing-list:content-type:content-transfer-encoding; bh=78myFnjQKmiB901VADRJ8Vkvr7v5GK84mlagmgindhg=; b=RHW4ZZPYxPm0ZGEMOxKfgMjqU9GeQ40zR71S/W/qI1Uenwp2vCJ9omQVAw/5bo8Zbi mz5k52oEYeMpz0ESskys9315a08ghp3pF4TDV/cIrwlcXwimaBNnbclQG7UTaGMh2qgd YAZhx3rOKQQJ7s/fWa/jQ9DelXzYJtAm2qQ+pyfubzdZTWK4xTbIPeQtEGk44DA6G6mL nQ8i1OwemdUVUDVUi68lY1Ru3psIdYMB7KkHrBoeMSn7+L+HdlCfjBbsnlxxR/kofiDR y8f5i+or6E6mePhvsrWf8jvcBXHmiGm3h8SnEVnlZoQ2VdZgHtl8RLw4h5o6pyLsSLnW nT6w== X-Gm-Message-State: ALoCoQk8CzBtx+71xJ2YimewZj63+Bkf37ctKbRwOHaz4YmSDY6/dKyMmFldG6+NiT2kDMtQqpY+ X-Received: by 10.236.123.68 with SMTP id u44mr36608yhh.19.1403024827274; Tue, 17 Jun 2014 10:07:07 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.96.201 with SMTP id k67ls4922531qge.22.gmail; Tue, 17 Jun 2014 10:07:07 -0700 (PDT) X-Received: by 10.52.136.98 with SMTP id pz2mr1215672vdb.70.1403024827090; Tue, 17 Jun 2014 10:07:07 -0700 (PDT) Received: from mail-ve0-f176.google.com (mail-ve0-f176.google.com [209.85.128.176]) by mx.google.com with ESMTPS id mg9si5720539vcb.58.2014.06.17.10.07.07 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 17 Jun 2014 10:07:07 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.176 as permitted sender) client-ip=209.85.128.176; Received: by mail-ve0-f176.google.com with SMTP id db12so7792847veb.21 for ; Tue, 17 Jun 2014 10:07:07 -0700 (PDT) X-Received: by 10.58.195.234 with SMTP id ih10mr2132828vec.41.1403024826988; Tue, 17 Jun 2014 10:07:06 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.221.54.6 with SMTP id vs6csp224767vcb; Tue, 17 Jun 2014 10:07:06 -0700 (PDT) X-Received: by 10.140.40.180 with SMTP id x49mr36705199qgx.16.1403024826472; Tue, 17 Jun 2014 10:07:06 -0700 (PDT) Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id 10si14572455qgi.13.2014.06.17.10.07.06 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Jun 2014 10:07:06 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WwwpO-0007c7-3k; Tue, 17 Jun 2014 17:05:46 +0000 Received: from cam-admin0.cambridge.arm.com ([217.140.96.50]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wwwou-0006L5-0E for linux-arm-kernel@lists.infradead.org; Tue, 17 Jun 2014 17:05:17 +0000 Received: from leverpostej.cambridge.arm.com (leverpostej.cambridge.arm.com [10.1.205.151]) by cam-admin0.cambridge.arm.com (8.12.6/8.12.6) with ESMTP id s5HH4ewq015319; Tue, 17 Jun 2014 18:04:53 +0100 (BST) From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Subject: [PATCHv2 2/4] arm64: cpuinfo: print info for all CPUs Date: Tue, 17 Jun 2014 18:04:32 +0100 Message-Id: <1403024674-25108-3-git-send-email-mark.rutland@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1403024674-25108-1-git-send-email-mark.rutland@arm.com> References: <1403024674-25108-1-git-send-email-mark.rutland@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140617_100516_471661_B30DB17D X-CRM114-Status: GOOD ( 21.30 ) X-Spam-Score: -6.0 (------) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-6.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [217.140.96.50 listed in list.dnswl.org] -1.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.0 SPF_PASS SPF: sender matches SPF record Cc: Mark Rutland , lorenzo.pieralisi@arm.com, will.deacon@arm.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: mark.rutland@arm.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.176 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Currently reading /proc/cpuinfo will result in information being read out of the MIDR_EL1 of the current CPU, and the information is not associated with any particular logical CPU number. This is problematic for systems with heterogeneous CPUs (i.e. big.LITTLE) where fields will vary across CPUs, and the output will differ depending on the executing CPU. Additionally the output is different in format to the 32-bit ARM Linux port, where information is printed out for each CPU. This patch adds the necessary infrastructure to log the relevant registers (currently just MIDR_EL1) and print out the logged information. Signed-off-by: Mark Rutland Reviewed-by: Lorenzo Pieralisi --- arch/arm64/include/asm/cpu.h | 30 +++++++++++++++++++++++++++++ arch/arm64/kernel/Makefile | 3 ++- arch/arm64/kernel/cpuinfo.c | 31 +++++++++++++++++++++++++++++ arch/arm64/kernel/setup.c | 46 +++++++++++++++++++++++--------------------- arch/arm64/kernel/smp.c | 6 ++++++ 5 files changed, 93 insertions(+), 23 deletions(-) create mode 100644 arch/arm64/include/asm/cpu.h create mode 100644 arch/arm64/kernel/cpuinfo.c diff --git a/arch/arm64/include/asm/cpu.h b/arch/arm64/include/asm/cpu.h new file mode 100644 index 0000000..74bf9bb --- /dev/null +++ b/arch/arm64/include/asm/cpu.h @@ -0,0 +1,30 @@ +/* + * arch/arm/include/asm/cpu.h + * + * Copyright (C) 2004-2014 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __ASM_ARM64_CPU_H +#define __ASM_ARM64_CPU_H + +#include +#include + +/* + * Records attributes of an individual CPU. + * + * This is used to cache data for /proc/cpuinfo. + */ +struct cpuinfo_arm64 { + struct cpu cpu; + u32 reg_midr; +}; + +DECLARE_PER_CPU(struct cpuinfo_arm64, cpu_data); + +void cpuinfo_store_cpu(void); + +#endif diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile index cdaedad..27c72ef 100644 --- a/arch/arm64/kernel/Makefile +++ b/arch/arm64/kernel/Makefile @@ -15,7 +15,8 @@ CFLAGS_REMOVE_return_address.o = -pg arm64-obj-y := cputable.o debug-monitors.o entry.o irq.o fpsimd.o \ entry-fpsimd.o process.o ptrace.o setup.o signal.o \ sys.o stacktrace.o time.o traps.o io.o vdso.o \ - hyp-stub.o psci.o cpu_ops.o insn.o return_address.o + hyp-stub.o psci.o cpu_ops.o insn.o return_address.o \ + cpuinfo.o arm64-obj-$(CONFIG_COMPAT) += sys32.o kuser32.o signal32.o \ sys_compat.o diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c new file mode 100644 index 0000000..340621d --- /dev/null +++ b/arch/arm64/kernel/cpuinfo.c @@ -0,0 +1,31 @@ +/* + * Record CPU attributes for later retrieval + * + * Copyright (C) 2014 ARM Ltd. + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#include +#include + +#include + +DEFINE_PER_CPU(struct cpuinfo_arm64, cpu_data); + +void cpuinfo_store_cpu(void) +{ + int cpu = smp_processor_id(); + struct cpuinfo_arm64 *cpuinfo = &per_cpu(cpu_data, cpu); + + cpuinfo->reg_midr = read_cpuid_id(); +} + diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index 46d1125..ba2b15f 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -45,6 +45,7 @@ #include #include +#include #include #include #include @@ -396,6 +397,7 @@ void __init setup_arch(char **cmdline_p) cpu_logical_map(0) = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; cpu_read_bootcpu_ops(); + cpuinfo_store_cpu(); #ifdef CONFIG_SMP smp_init_cpus(); smp_build_mpidr_hash(); @@ -417,14 +419,12 @@ static int __init arm64_device_init(void) } arch_initcall_sync(arm64_device_init); -static DEFINE_PER_CPU(struct cpu, cpu_data); - static int __init topology_init(void) { int i; for_each_possible_cpu(i) { - struct cpu *cpu = &per_cpu(cpu_data, i); + struct cpu *cpu = &per_cpu(cpu_data.cpu, i); cpu->hotpluggable = 1; register_cpu(cpu, i); } @@ -447,38 +447,40 @@ static const char *hwcap_str[] = { static int c_show(struct seq_file *m, void *v) { - int i; + int c; - seq_printf(m, "Processor\t: %s rev %d (%s)\n", - cpu_name, read_cpuid_id() & 15, ELF_PLATFORM); + for_each_online_cpu(c) { + int i; + struct cpuinfo_arm64 *cpuinfo = &per_cpu(cpu_data, c); + u32 midr = cpuinfo->reg_midr; - for_each_online_cpu(i) { /* * glibc reads /proc/cpuinfo to determine the number of * online processors, looking for lines beginning with * "processor". Give glibc what it expects. */ #ifdef CONFIG_SMP - seq_printf(m, "processor\t: %d\n", i); + seq_printf(m, "processor\t: %d\n", c); #endif - } + seq_printf(m, "Type\t\t: %s rev %d (%s)\n", + cpu_name, MIDR_REVISION(midr), ELF_PLATFORM); - /* dump out the processor features */ - seq_puts(m, "Features\t: "); + /* dump out the processor features */ + seq_puts(m, "Features\t: "); - for (i = 0; hwcap_str[i]; i++) - if (elf_hwcap & (1 << i)) - seq_printf(m, "%s ", hwcap_str[i]); + for (i = 0; hwcap_str[i]; i++) + if (elf_hwcap & (1 << i)) + seq_printf(m, "%s ", hwcap_str[i]); - seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24); - seq_printf(m, "CPU architecture: AArch64\n"); - seq_printf(m, "CPU variant\t: 0x%x\n", (read_cpuid_id() >> 20) & 15); - seq_printf(m, "CPU part\t: 0x%03x\n", (read_cpuid_id() >> 4) & 0xfff); - seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15); + seq_printf(m, "\nCPU implementer\t: 0x%02x\n", + MIDR_IMPLEMENTOR(midr)); + seq_printf(m, "CPU architecture: AArch64\n"); + seq_printf(m, "CPU variant\t: 0x%x\n", MIDR_VARIANT(midr)); + seq_printf(m, "CPU part\t: 0x%03x\n", MIDR_PARTNUM(midr)); + seq_printf(m, "CPU revision\t: %d\n", MIDR_REVISION(midr)); - seq_puts(m, "\n"); - - seq_printf(m, "Hardware\t: %s\n", machine_name); + seq_puts(m, "\n"); + } return 0; } diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index 40f38f4..7c730a6 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -39,6 +39,7 @@ #include #include +#include #include #include #include @@ -162,6 +163,11 @@ asmlinkage void secondary_start_kernel(void) smp_store_cpu_info(cpu); /* + * Log the CPU info before it is marked online and might get read. + */ + cpuinfo_store_cpu(); + + /* * OK, now it's safe to let the boot CPU continue. Wait for * the CPU migration code to notice that the CPU is online * before we continue.