From patchwork Mon Jun 30 13:01:53 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 32720 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-pd0-f197.google.com (mail-pd0-f197.google.com [209.85.192.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 80D23203F4 for ; Mon, 30 Jun 2014 13:02:37 +0000 (UTC) Received: by mail-pd0-f197.google.com with SMTP id fp1sf39009111pdb.0 for ; Mon, 30 Jun 2014 06:02:36 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=f3gYdx3rujf4s4MgNmrojRYWoHf8pnb1skqKidPGBWI=; b=Dzlqun2Finigt0jYJOoQoroCx2o15r7KynCCGUvQhEOU8hbaoZWXBA9Al9WbZmTq5L 2V4F6kDLYAdpB8FY5dWulqWOqt+gShIcdW4xrADYTjZlJxOJSg6t0QOqsY8Hzc2PeEMP r0G/dVcUh4DuUCplaNMfhYa6Z0Ru3fwd5SRcQ3+RvjfFj0hEsUVx9JhZ32w40cXqTkO9 e4g4RnE1V+zUdZIGqjEc7Vuu3iymqc9PuSAyo+VzFbSYdzrO8V8VoYoxvlG+NPENtKiW nw9paJ4kllxkme7uCD6+xhMhvUQR2+D0PRUYUmM10wKYZRlDUf/jXk6gSGzJ1zB+pQ2C Ckeg== X-Gm-Message-State: ALoCoQnSR9sayiIWyf4hA8irJb4O0rJgGL1GPVfmSc64DU+T+blSogDlTVULWWzS8vImvastAU8E X-Received: by 10.66.173.75 with SMTP id bi11mr23365337pac.4.1404133356582; Mon, 30 Jun 2014 06:02:36 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.97.7 with SMTP id l7ls1440985qge.63.gmail; Mon, 30 Jun 2014 06:02:36 -0700 (PDT) X-Received: by 10.52.101.168 with SMTP id fh8mr31706593vdb.34.1404133356435; Mon, 30 Jun 2014 06:02:36 -0700 (PDT) Received: from mail-ve0-f169.google.com (mail-ve0-f169.google.com [209.85.128.169]) by mx.google.com with ESMTPS id er10si9976773vdc.28.2014.06.30.06.02.36 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 30 Jun 2014 06:02:36 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.169 as permitted sender) client-ip=209.85.128.169; Received: by mail-ve0-f169.google.com with SMTP id pa12so8188246veb.28 for ; Mon, 30 Jun 2014 06:02:36 -0700 (PDT) X-Received: by 10.52.88.44 with SMTP id bd12mr86641vdb.86.1404133356360; Mon, 30 Jun 2014 06:02:36 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.221.37.5 with SMTP id tc5csp136842vcb; Mon, 30 Jun 2014 06:02:35 -0700 (PDT) X-Received: by 10.66.235.34 with SMTP id uj2mr52791513pac.28.1404133355357; Mon, 30 Jun 2014 06:02:35 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id yh3si23050129pab.170.2014.06.30.06.02.34; Mon, 30 Jun 2014 06:02:34 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751564AbaF3NCV (ORCPT + 27 others); Mon, 30 Jun 2014 09:02:21 -0400 Received: from mail-ie0-f179.google.com ([209.85.223.179]:39147 "EHLO mail-ie0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753091AbaF3NCR (ORCPT ); Mon, 30 Jun 2014 09:02:17 -0400 Received: by mail-ie0-f179.google.com with SMTP id tr6so6859580ieb.38 for ; Mon, 30 Jun 2014 06:02:16 -0700 (PDT) X-Received: by 10.50.57.7 with SMTP id e7mr31786123igq.47.1404133336214; Mon, 30 Jun 2014 06:02:16 -0700 (PDT) Received: from localhost.localdomain (host109-148-235-194.range109-148.btcentralplus.com. [109.148.235.194]) by mx.google.com with ESMTPSA id d10sm14313253igz.11.2014.06.30.06.02.13 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 30 Jun 2014 06:02:15 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kishon@ti.com Cc: lee.jones@linaro.org, kernel@stlinux.com Subject: [PATCH 1/5] phy: miphy365x: Add Device Tree bindings for the MiPHY365x Date: Mon, 30 Jun 2014 14:01:53 +0100 Message-Id: <1404133317-25953-2-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1404133317-25953-1-git-send-email-lee.jones@linaro.org> References: <1404133317-25953-1-git-send-email-lee.jones@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.169 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The MiPHY365x is a Generic PHY which can serve various SATA or PCIe devices. It has 2 ports which it can use for either; both SATA, both PCIe or one of each in any configuration. Cc: Kishon Vijay Abraham I Acked-by: Mark Rutland Acked-by: Alexandre Torgue Signed-off-by: Lee Jones --- .../devicetree/bindings/phy/phy-miphy365x.txt | 76 ++++++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/phy-miphy365x.txt diff --git a/Documentation/devicetree/bindings/phy/phy-miphy365x.txt b/Documentation/devicetree/bindings/phy/phy-miphy365x.txt new file mode 100644 index 0000000..d75f300 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-miphy365x.txt @@ -0,0 +1,76 @@ +STMicroelectronics STi MIPHY365x PHY binding +============================================ + +This binding describes a miphy device that is used to control PHY hardware +for SATA and PCIe. + +Required properties: +- compatible : Should be "st,miphy365x-phy" +- #phy-cells : Should be 2 (See second example) + First cell is the port number from: + - MIPHY_PORT_0 + - MIPHY_PORT_1 + Second cell is device type from: + - MIPHY_TYPE_SATA + - MIPHY_TYPE_PCI +- reg : Address and length of register sets for each device in + "reg-names" +- reg-names : The names of the register addresses corresponding to the + registers filled in "reg", from: + - sata0: For SATA port 0 registers + - sata1: For SATA port 1 registers + - pcie0: For PCIE port 0 registers + - pcie1: For PCIE port 1 registers +- st,syscfg : Should be a phandle of the system configuration register group + which contain the SATA, PCIe mode setting bits + +Optional properties: +- st,sata-gen : Generation of locally attached SATA IP. Expected values + are {1,2,3). If not supplied generation 1 hardware will + be expected +- st,pcie-tx-pol-inv : Bool property to invert the polarity PCIe Tx (Txn/Txp) +- st,sata-tx-pol-inv : Bool property to invert the polarity SATA Tx (Txn/Txp) + +Required nodes : A sub-node is required for each channel the controller + provides. Address range information including the usual + 'reg' and 'reg-names' properties are used inside these + nodes to describe the controller's topology. These nodes + are translated by the driver's .xlate() function. + +Example: + + miphy365x_phy: miphy365x@fe382000 { + compatible = "st,miphy365x-phy"; + st,syscfg = <&syscfg_rear>; + #phy-cells = <2>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + phy_port0: port@fe382000 { + reg = <0xfe382000 0x100>, <0xfe394000 0x100>; + reg-names = "sata", "pcie"; + }; + + phy_port1: port@fe38a000 { + reg = <0xfe38a000 0x100>, <0xfe804000 0x100>; + reg-names = "sata", "pcie"; + }; + }; + +Specifying phy control of devices +================================= + +Device nodes should specify the configuration required in their "phys" +property, containing a phandle to the miphy device node, a port number +and a device type. + +Example: + +#include + + sata0: sata@fe380000 { + ... + phys = <&miphy365x_phy MIPHY_PORT_0 MIPHY_TYPE_SATA>; + ... + };