From patchwork Tue Jul 29 10:49:08 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 34465 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oi0-f70.google.com (mail-oi0-f70.google.com [209.85.218.70]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id F0939202E4 for ; Tue, 29 Jul 2014 10:51:27 +0000 (UTC) Received: by mail-oi0-f70.google.com with SMTP id u20sf46305030oif.5 for ; Tue, 29 Jul 2014 03:51:27 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:subject:date:message-id :in-reply-to:references:cc:precedence:list-id:list-unsubscribe :list-archive:list-post:list-help:list-subscribe:mime-version:sender :errors-to:x-original-sender:x-original-authentication-results :mailing-list:content-type:content-transfer-encoding; bh=swsaK599VG5eHhAqazFXwuvI3UdMpaYnJza64fjqZNM=; b=WitBVTb0PjRTR2ybc01a1mFny0jgFRRdeQoRSA+crHN1tT3lz4qAzrdNc13DEUGJNy WTOQqrDLDxvENcO0L6njkCkn+Gnb+LylO/8Q/063iBvCSk0BDOENOXHW9rJ56jULfiUF 0yCrkMaBspnpoqJE3r8UguagAQ19Ta02oSRqKG2xUDK71gezA/296p8NA6AxilHCLgMU dDW2Evm+OGSGZ+JndLHJW/w8cMOAkQ28S+1almZlFNB/TTTtZeOwi7i7cjnr0KepAYFz L4cozvCFFStrcbOl89Dn6POCBrRRYi7tYsvPowYrGbxNod4B9ufsF8z61hhTTioej4U0 2AEQ== X-Gm-Message-State: ALoCoQlSM0RfLHTFN58EY+pRyB2gZeR8jT+A9Hn0a6mmlMpVzbfTmNGkiZKJMJjjzdE09Lgqb18B X-Received: by 10.182.33.35 with SMTP id o3mr450418obi.8.1406631087545; Tue, 29 Jul 2014 03:51:27 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.97.52 with SMTP id l49ls45020qge.69.gmail; Tue, 29 Jul 2014 03:51:27 -0700 (PDT) X-Received: by 10.52.117.209 with SMTP id kg17mr726171vdb.28.1406631087420; Tue, 29 Jul 2014 03:51:27 -0700 (PDT) Received: from mail-vc0-f179.google.com (mail-vc0-f179.google.com [209.85.220.179]) by mx.google.com with ESMTPS id yy2si14318023vdc.48.2014.07.29.03.51.27 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 29 Jul 2014 03:51:27 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.179 as permitted sender) client-ip=209.85.220.179; Received: by mail-vc0-f179.google.com with SMTP id hq11so12870586vcb.24 for ; Tue, 29 Jul 2014 03:51:27 -0700 (PDT) X-Received: by 10.52.35.81 with SMTP id f17mr677512vdj.13.1406631087343; Tue, 29 Jul 2014 03:51:27 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.221.37.5 with SMTP id tc5csp235064vcb; Tue, 29 Jul 2014 03:51:26 -0700 (PDT) X-Received: by 10.70.118.197 with SMTP id ko5mr1271632pdb.64.1406631081990; Tue, 29 Jul 2014 03:51:21 -0700 (PDT) Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id uf7si20721693pbc.8.2014.07.29.03.51.21 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 29 Jul 2014 03:51:21 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XC4z4-0005O2-NT; Tue, 29 Jul 2014 10:50:18 +0000 Received: from mail-wi0-f182.google.com ([209.85.212.182]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XC4yd-00040A-MG for linux-arm-kernel@lists.infradead.org; Tue, 29 Jul 2014 10:49:52 +0000 Received: by mail-wi0-f182.google.com with SMTP id d1so728278wiv.9 for ; Tue, 29 Jul 2014 03:49:22 -0700 (PDT) X-Received: by 10.180.221.172 with SMTP id qf12mr5039314wic.18.1406630962116; Tue, 29 Jul 2014 03:49:22 -0700 (PDT) Received: from ards-macbook-pro.local (adsl59mo2.tel.net.ba. [95.156.191.2]) by mx.google.com with ESMTPSA id k6sm13852902wjq.5.2014.07.29.03.49.20 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 29 Jul 2014 03:49:21 -0700 (PDT) From: Ard Biesheuvel To: linux-efi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, mark.rutland@arm.com, leif.lindholm@linaro.org Subject: [PATCH 1/3] arm64: spin-table: handle unmapped cpu-release-addrs Date: Tue, 29 Jul 2014 12:49:08 +0200 Message-Id: <1406630950-32432-2-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1406630950-32432-1-git-send-email-ard.biesheuvel@linaro.org> References: <1406630950-32432-1-git-send-email-ard.biesheuvel@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140729_034951_890213_C8B41E0E X-CRM114-Status: GOOD ( 17.43 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.212.182 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.212.182 listed in wl.mailspike.net] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders Cc: matt.fleming@intel.com, msalter@redhat.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ard.biesheuvel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.179 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Mark Rutland In certain cases the cpu-release-addr of a CPU may not fall in the linear mapping (e.g. when the kernel is loaded above this address due to the presence of other images in memory). This is problematic for the spin-table code as it assumes that it can trivially convert a cpu-release-addr to a valid VA in the linear map. This patch modifies the spin-table code to use a temporary cached mapping to write to a given cpu-release-addr, enabling us to support addresses regardless of whether they are covered by the linear mapping. Signed-off-by: Mark Rutland Tested-by: Mark Salter --- arch/arm64/kernel/smp_spin_table.c | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/arch/arm64/kernel/smp_spin_table.c b/arch/arm64/kernel/smp_spin_table.c index 0347d38eea29..70181c1bf42d 100644 --- a/arch/arm64/kernel/smp_spin_table.c +++ b/arch/arm64/kernel/smp_spin_table.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -65,12 +66,21 @@ static int smp_spin_table_cpu_init(struct device_node *dn, unsigned int cpu) static int smp_spin_table_cpu_prepare(unsigned int cpu) { - void **release_addr; + __le64 __iomem *release_addr; if (!cpu_release_addr[cpu]) return -ENODEV; - release_addr = __va(cpu_release_addr[cpu]); + /* + * The cpu-release-addr may or may not be inside the linear mapping. + * As ioremap_cache will either give us a new mapping or reuse the + * existing linear mapping, we can use it to cover both cases. In + * either case the memory will be MT_NORMAL. + */ + release_addr = ioremap_cache(cpu_release_addr[cpu], + sizeof(*release_addr)); + if (!release_addr) + return -ENOMEM; /* * We write the release address as LE regardless of the native @@ -79,15 +89,16 @@ static int smp_spin_table_cpu_prepare(unsigned int cpu) * boot-loader's endianess before jumping. This is mandated by * the boot protocol. */ - release_addr[0] = (void *) cpu_to_le64(__pa(secondary_holding_pen)); - - __flush_dcache_area(release_addr, sizeof(release_addr[0])); + writeq_relaxed(__pa(secondary_holding_pen), release_addr); + __flush_dcache_area(release_addr, sizeof(*release_addr)); /* * Send an event to wake up the secondary CPU. */ sev(); + iounmap(release_addr); + return 0; }