From patchwork Wed Jul 30 10:59:02 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 34508 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-we0-f199.google.com (mail-we0-f199.google.com [74.125.82.199]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 4175020DCC for ; Wed, 30 Jul 2014 11:01:15 +0000 (UTC) Received: by mail-we0-f199.google.com with SMTP id p10sf665674wes.6 for ; Wed, 30 Jul 2014 04:01:14 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:subject:date:message-id :in-reply-to:references:cc:precedence:list-id:list-unsubscribe :list-archive:list-post:list-help:list-subscribe:mime-version:sender :errors-to:x-original-sender:x-original-authentication-results :mailing-list:content-type:content-transfer-encoding; bh=f2qm5C/XtMP+WAhFUhRo1x6OpggXWnmiiSforcSYByM=; b=DEFqdaxU56F6ARCWyMJzlpic9RBEqMgQA+twGJsAX46CFEbw0zyMt2tvEPvuJtMil5 9zEyNgyqoczvuVFJ+eyG84ZkfmujqGKZQEQc2k8Zmmou7uWc2K5VNZBzA39KdkHqOjvV Lj12VBWm7bXnYomdiDBzdqx6JCCmkLp/JbwNHqtlB6eDklBF1eOhT++hzi6WjiVhOEOT VbbMvpgh/7JG9iLIGMTRKY9Cyn3beOo5If1pH5OxI61n5ky/JMdoIMz0AherJSbqCAcF EsdQQw5hLOS0RtvkLRHcdX6UfwLdJ1uA+q4KeirQEaHkFexerwit2JQ6DP3g8ieOLWCk ntoA== X-Gm-Message-State: ALoCoQlT/9Gkpa7yBrL88ux0lssrViAQZvNfijB/4z2dGmfZ1+wkF0KldaidPILGbAq0UJB5dQAh X-Received: by 10.194.3.34 with SMTP id 2mr349026wjz.4.1406718073084; Wed, 30 Jul 2014 04:01:13 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.94.236 with SMTP id g99ls497844qge.17.gmail; Wed, 30 Jul 2014 04:01:12 -0700 (PDT) X-Received: by 10.220.173.134 with SMTP id p6mr3188581vcz.36.1406718072627; Wed, 30 Jul 2014 04:01:12 -0700 (PDT) Received: from mail-vc0-f169.google.com (mail-vc0-f169.google.com [209.85.220.169]) by mx.google.com with ESMTPS id s6si1242556vdz.85.2014.07.30.04.01.12 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 30 Jul 2014 04:01:12 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.169 as permitted sender) client-ip=209.85.220.169; Received: by mail-vc0-f169.google.com with SMTP id le20so1471497vcb.14 for ; Wed, 30 Jul 2014 04:01:12 -0700 (PDT) X-Received: by 10.221.68.135 with SMTP id xy7mr1297946vcb.65.1406718072537; Wed, 30 Jul 2014 04:01:12 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.221.37.5 with SMTP id tc5csp18008vcb; Wed, 30 Jul 2014 04:01:12 -0700 (PDT) X-Received: by 10.66.237.2 with SMTP id uy2mr2271928pac.157.1406718071397; Wed, 30 Jul 2014 04:01:11 -0700 (PDT) Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id fk7si1988005pab.169.2014.07.30.04.01.11 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 30 Jul 2014 04:01:11 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XCRbq-00059r-KV; Wed, 30 Jul 2014 10:59:50 +0000 Received: from mail-we0-f182.google.com ([74.125.82.182]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XCRbg-00054X-TS for linux-arm-kernel@lists.infradead.org; Wed, 30 Jul 2014 10:59:41 +0000 Received: by mail-we0-f182.google.com with SMTP id k48so1003566wev.41 for ; Wed, 30 Jul 2014 03:59:17 -0700 (PDT) X-Received: by 10.180.189.234 with SMTP id gl10mr4922357wic.56.1406717957307; Wed, 30 Jul 2014 03:59:17 -0700 (PDT) Received: from ards-macbook-pro.local (adsl26mo10.tel.net.ba. [95.156.174.10]) by mx.google.com with ESMTPSA id wu6sm4660963wjb.46.2014.07.30.03.59.15 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 30 Jul 2014 03:59:16 -0700 (PDT) From: Ard Biesheuvel To: linux-efi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, mark.rutland@arm.com, leif.lindholm@linaro.org, msalter@redhat.com, will.deacon@arm.com Subject: [PATCH v2 1/3] arm64: spin-table: handle unmapped cpu-release-addrs Date: Wed, 30 Jul 2014 12:59:02 +0200 Message-Id: <1406717944-24725-2-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1406717944-24725-1-git-send-email-ard.biesheuvel@linaro.org> References: <1406717944-24725-1-git-send-email-ard.biesheuvel@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140730_035941_119327_037EB10D X-CRM114-Status: GOOD ( 17.40 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.82.182 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [74.125.82.182 listed in wl.mailspike.net] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders Cc: matt.fleming@intel.com, Ard Biesheuvel X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ard.biesheuvel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.169 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Mark Rutland In certain cases the cpu-release-addr of a CPU may not fall in the linear mapping (e.g. when the kernel is loaded above this address due to the presence of other images in memory). This is problematic for the spin-table code as it assumes that it can trivially convert a cpu-release-addr to a valid VA in the linear map. This patch modifies the spin-table code to use a temporary cached mapping to write to a given cpu-release-addr, enabling us to support addresses regardless of whether they are covered by the linear mapping. Signed-off-by: Mark Rutland Tested-by: Mark Salter [ardb: added (__force void *) cast] Signed-off-by: Ard Biesheuvel --- arch/arm64/kernel/smp_spin_table.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/arch/arm64/kernel/smp_spin_table.c b/arch/arm64/kernel/smp_spin_table.c index 0347d38eea29..4f93c67e63de 100644 --- a/arch/arm64/kernel/smp_spin_table.c +++ b/arch/arm64/kernel/smp_spin_table.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -65,12 +66,21 @@ static int smp_spin_table_cpu_init(struct device_node *dn, unsigned int cpu) static int smp_spin_table_cpu_prepare(unsigned int cpu) { - void **release_addr; + __le64 __iomem *release_addr; if (!cpu_release_addr[cpu]) return -ENODEV; - release_addr = __va(cpu_release_addr[cpu]); + /* + * The cpu-release-addr may or may not be inside the linear mapping. + * As ioremap_cache will either give us a new mapping or reuse the + * existing linear mapping, we can use it to cover both cases. In + * either case the memory will be MT_NORMAL. + */ + release_addr = ioremap_cache(cpu_release_addr[cpu], + sizeof(*release_addr)); + if (!release_addr) + return -ENOMEM; /* * We write the release address as LE regardless of the native @@ -79,15 +89,17 @@ static int smp_spin_table_cpu_prepare(unsigned int cpu) * boot-loader's endianess before jumping. This is mandated by * the boot protocol. */ - release_addr[0] = (void *) cpu_to_le64(__pa(secondary_holding_pen)); - - __flush_dcache_area(release_addr, sizeof(release_addr[0])); + writeq_relaxed(__pa(secondary_holding_pen), release_addr); + __flush_dcache_area((__force void *)release_addr, + sizeof(*release_addr)); /* * Send an event to wake up the secondary CPU. */ sev(); + iounmap(release_addr); + return 0; }