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[209.132.180.67]) by mx.google.com with ESMTP id l7si10277218pdk.149.2014.09.21.20.21.54 for ; Sun, 21 Sep 2014 20:21:55 -0700 (PDT) Received-SPF: none (google.com: devicetree-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752600AbaIVDVy (ORCPT + 5 others); Sun, 21 Sep 2014 23:21:54 -0400 Received: from mail-pa0-f43.google.com ([209.85.220.43]:54254 "EHLO mail-pa0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752429AbaIVDVy (ORCPT ); Sun, 21 Sep 2014 23:21:54 -0400 Received: by mail-pa0-f43.google.com with SMTP id kx10so3696822pab.2 for ; Sun, 21 Sep 2014 20:21:53 -0700 (PDT) X-Received: by 10.66.139.16 with SMTP id qu16mr61127pab.153.1411356113540; Sun, 21 Sep 2014 20:21:53 -0700 (PDT) Received: from localhost.localdomain ([124.73.85.115]) by mx.google.com with ESMTPSA id k7sm2871925pdp.77.2014.09.21.20.21.44 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 21 Sep 2014 20:21:52 -0700 (PDT) From: Zhangfei Gao To: Mike Turquette , haojian.zhuang@linaro.org, haifeng.yan@linaro.org, jchxue@gmail.com, xuwei5@hisilicon.com Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Wei Yan , Zhangfei Gao Subject: [PATCH v5 4/4] clk: hix5hd2: add I2C clocks Date: Mon, 22 Sep 2014 11:20:16 +0800 Message-Id: <1411356016-20553-5-git-send-email-zhangfei.gao@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1411356016-20553-1-git-send-email-zhangfei.gao@linaro.org> References: <1411356016-20553-1-git-send-email-zhangfei.gao@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: zhangfei.gao@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.43 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Wei Yan hix5hd2 add I2C clocks (I2C0~i2C5) Signed-off-by: Wei Yan Signed-off-by: Zhangfei Gao --- drivers/clk/hisilicon/clk-hix5hd2.c | 25 +++++++++++++++++++++++++ include/dt-bindings/clock/hix5hd2-clock.h | 12 ++++++++++++ 2 files changed, 37 insertions(+) diff --git a/drivers/clk/hisilicon/clk-hix5hd2.c b/drivers/clk/hisilicon/clk-hix5hd2.c index 6e97e54..3f369c6 100644 --- a/drivers/clk/hisilicon/clk-hix5hd2.c +++ b/drivers/clk/hisilicon/clk-hix5hd2.c @@ -100,6 +100,31 @@ static struct hisi_gate_clock hix5hd2_gate_clks[] __initdata = { CLK_SET_RATE_PARENT, 0x178, 0, 0, }, { HIX5HD2_WDG0_RST, "rst_wdg0", "clk_wdg0", CLK_SET_RATE_PARENT, 0x178, 4, CLK_GATE_SET_TO_DISABLE, }, + /* I2C */ + {HIX5HD2_I2C0_CLK, "clk_i2c0", "100m", + CLK_SET_RATE_PARENT, 0x06c, 4, 0, }, + {HIX5HD2_I2C0_RST, "rst_i2c0", "clk_i2c0", + CLK_SET_RATE_PARENT, 0x06c, 5, CLK_GATE_SET_TO_DISABLE, }, + {HIX5HD2_I2C1_CLK, "clk_i2c1", "100m", + CLK_SET_RATE_PARENT, 0x06c, 8, 0, }, + {HIX5HD2_I2C1_RST, "rst_i2c1", "clk_i2c1", + CLK_SET_RATE_PARENT, 0x06c, 9, CLK_GATE_SET_TO_DISABLE, }, + {HIX5HD2_I2C2_CLK, "clk_i2c2", "100m", + CLK_SET_RATE_PARENT, 0x06c, 12, 0, }, + {HIX5HD2_I2C2_RST, "rst_i2c2", "clk_i2c2", + CLK_SET_RATE_PARENT, 0x06c, 13, CLK_GATE_SET_TO_DISABLE, }, + {HIX5HD2_I2C3_CLK, "clk_i2c3", "100m", + CLK_SET_RATE_PARENT, 0x06c, 16, 0, }, + {HIX5HD2_I2C3_RST, "rst_i2c3", "clk_i2c3", + CLK_SET_RATE_PARENT, 0x06c, 17, CLK_GATE_SET_TO_DISABLE, }, + {HIX5HD2_I2C4_CLK, "clk_i2c4", "100m", + CLK_SET_RATE_PARENT, 0x06c, 20, 0, }, + {HIX5HD2_I2C4_RST, "rst_i2c4", "clk_i2c4", + CLK_SET_RATE_PARENT, 0x06c, 21, CLK_GATE_SET_TO_DISABLE, }, + {HIX5HD2_I2C5_CLK, "clk_i2c5", "100m", + CLK_SET_RATE_PARENT, 0x06c, 0, 0, }, + {HIX5HD2_I2C5_RST, "rst_i2c5", "clk_i2c5", + CLK_SET_RATE_PARENT, 0x06c, 1, CLK_GATE_SET_TO_DISABLE, }, }; enum hix5hd2_clk_type { diff --git a/include/dt-bindings/clock/hix5hd2-clock.h b/include/dt-bindings/clock/hix5hd2-clock.h index b8e3c9d..fd29c17 100644 --- a/include/dt-bindings/clock/hix5hd2-clock.h +++ b/include/dt-bindings/clock/hix5hd2-clock.h @@ -62,6 +62,18 @@ #define HIX5HD2_SD_CIU_RST 138 #define HIX5HD2_WDG0_CLK 139 #define HIX5HD2_WDG0_RST 140 +#define HIX5HD2_I2C0_CLK 141 +#define HIX5HD2_I2C0_RST 142 +#define HIX5HD2_I2C1_CLK 143 +#define HIX5HD2_I2C1_RST 144 +#define HIX5HD2_I2C2_CLK 145 +#define HIX5HD2_I2C2_RST 146 +#define HIX5HD2_I2C3_CLK 147 +#define HIX5HD2_I2C3_RST 148 +#define HIX5HD2_I2C4_CLK 149 +#define HIX5HD2_I2C4_RST 150 +#define HIX5HD2_I2C5_CLK 151 +#define HIX5HD2_I2C5_RST 152 /* complex */ #define HIX5HD2_MAC0_CLK 192