From patchwork Tue Oct 7 16:24:23 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 38424 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-la0-f70.google.com (mail-la0-f70.google.com [209.85.215.70]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 0151A20D4A for ; Tue, 7 Oct 2014 16:25:00 +0000 (UTC) Received: by mail-la0-f70.google.com with SMTP id ge10sf4306715lab.9 for ; Tue, 07 Oct 2014 09:24:59 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=AW3P5MdWXS3b7I3oJfQz6JezxWACy9DHpI4yCluNa28=; b=lAJ/w2Buu1cdJr4+CrPgUzjFwDxvEPd7+x7CUXihkJuTtQGCjpxoG8o1x+n1bWs84Y 4UQl6Rw08VnhRQKJS2t8MdmgwUZQ3laC/uPstLFNa4pZZ5X5XVjE0H1PpJV0mfAICXED ag86NI96pvssX813pE+adFm/O0Zm9aMgNzoGTTXw1jFyIqgF2qc3enVSDajbyHpAimkc qgDjJUoj3TWheDzoBSWBuyA/P32MdrO4jR6S+yNAGdTtmC7yZyBcGnlea53CMF1UNJ8X aUEDzI3/R4CcUM7pYTLp70v8Y9CixH6l3Nb3PxTn9jDlO34qi/jpPAvZ9l754rWuLTav jPAg== X-Gm-Message-State: ALoCoQkbao8Ls3CJA1ZZp4ezvscYOfrQNsFKBY5OSuvRh2PTTlF1iOgSv5gAbeWVsBuB7ncrMsb9 X-Received: by 10.112.89.8 with SMTP id bk8mr740018lbb.6.1412699099863; Tue, 07 Oct 2014 09:24:59 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.23.227 with SMTP id p3ls724202laf.39.gmail; Tue, 07 Oct 2014 09:24:59 -0700 (PDT) X-Received: by 10.112.170.165 with SMTP id an5mr5093047lbc.6.1412699099630; Tue, 07 Oct 2014 09:24:59 -0700 (PDT) Received: from mail-la0-f41.google.com (mail-la0-f41.google.com [209.85.215.41]) by mx.google.com with ESMTPS id bd14si29332521lab.125.2014.10.07.09.24.59 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 07 Oct 2014 09:24:59 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.41 as permitted sender) client-ip=209.85.215.41; Received: by mail-la0-f41.google.com with SMTP id pn19so6766875lab.0 for ; Tue, 07 Oct 2014 09:24:59 -0700 (PDT) X-Received: by 10.152.28.167 with SMTP id c7mr5269548lah.27.1412699099267; Tue, 07 Oct 2014 09:24:59 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.112.130.169 with SMTP id of9csp378425lbb; Tue, 7 Oct 2014 09:24:58 -0700 (PDT) X-Received: by 10.70.129.72 with SMTP id nu8mr4880100pdb.91.1412699097457; Tue, 07 Oct 2014 09:24:57 -0700 (PDT) Received: from mail-pa0-f51.google.com (mail-pa0-f51.google.com [209.85.220.51]) by mx.google.com with ESMTPS id ni5si2424712pdb.141.2014.10.07.09.24.56 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 07 Oct 2014 09:24:57 -0700 (PDT) Received-SPF: pass (google.com: domain of mathieu.poirier@linaro.org designates 209.85.220.51 as permitted sender) client-ip=209.85.220.51; Received: by mail-pa0-f51.google.com with SMTP id lj1so7349052pab.24 for ; Tue, 07 Oct 2014 09:24:56 -0700 (PDT) X-Received: by 10.66.152.41 with SMTP id uv9mr4623253pab.25.1412699096783; Tue, 07 Oct 2014 09:24:56 -0700 (PDT) Received: from t430.cg.shawcable.net (S0106002369de4dac.cg.shawcable.net. [70.73.24.112]) by mx.google.com with ESMTPSA id ms3sm9262439pdb.19.2014.10.07.09.24.55 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 07 Oct 2014 09:24:56 -0700 (PDT) From: mathieu.poirier@linaro.org To: linux@arm.linux.org.uk, gregkh@linuxfoundation.org Cc: pratikp@codeaurora.org, varshney@ti.com, Al.Grant@arm.com, jonas.svennebring@avagotech.com, james.king@linaro.org, kaixu.xia@linaro.org, marcin.jabrzyk@gmail.com, r.sengupta@samsung.com, robbelibobban@gmail.com, patches@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, mathieu.poirier@linaro.org Subject: [PATCH RESEND v7 10/11] coresight: adding basic support for Vexpress TC2 Date: Tue, 7 Oct 2014 10:24:23 -0600 Message-Id: <1412699064-17376-11-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1412699064-17376-1-git-send-email-mathieu.poirier@linaro.org> References: <1412699064-17376-1-git-send-email-mathieu.poirier@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: mathieu.poirier@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.41 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Mathieu Poirier Support for the 2 PTMs, 3 ETMs, funnel, TPIU and replicator connected to the ETB are included. Proper handling of the ITM and the replicator linked to it along with the CTIs and SWO are not included. Signed-off-by: Mathieu Poirier --- arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 198 +++++++++++++++++++++++++++++ 1 file changed, 198 insertions(+) diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts index a25c262..8ec126e 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts @@ -335,6 +335,204 @@ }; }; + etb@0,20010000 { + compatible = "arm,coresight-etb10", "arm,primecell"; + reg = <0 0x20010000 0 0x1000>; + + coresight-default-sink; + clocks = <&oscclk6a>; + clock-names = "apb_pclk"; + port { + etb_in_port: endpoint@0 { + slave-mode; + remote-endpoint = <&replicator_out_port0>; + }; + }; + }; + + tpiu@0,20030000 { + compatible = "arm,coresight-tpiu", "arm,primecell"; + reg = <0 0x20030000 0 0x1000>; + + clocks = <&oscclk6a>; + clock-names = "apb_pclk"; + port { + tpiu_in_port: endpoint@0 { + slave-mode; + remote-endpoint = <&replicator_out_port1>; + }; + }; + }; + + replicator { + /* non-configurable replicators don't show up on the + * AMBA bus. As such no need to add "arm,primecell". + */ + compatible = "arm,coresight-replicator"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* replicator output ports */ + port@0 { + reg = <0>; + replicator_out_port0: endpoint { + remote-endpoint = <&etb_in_port>; + }; + }; + + port@1 { + reg = <1>; + replicator_out_port1: endpoint { + remote-endpoint = <&tpiu_in_port>; + }; + }; + + /* replicator input port */ + port@2 { + reg = <0>; + replicator_in_port0: endpoint { + slave-mode; + remote-endpoint = <&funnel_out_port0>; + }; + }; + }; + }; + + funnel@0,20040000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0 0x20040000 0 0x1000>; + + clocks = <&oscclk6a>; + clock-names = "apb_pclk"; + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* funnel output port */ + port@0 { + reg = <0>; + funnel_out_port0: endpoint { + remote-endpoint = <&replicator_in_port0>; + }; + }; + + /* funnel input ports */ + port@1 { + reg = <0>; + funnel_in_port0: endpoint { + slave-mode; + remote-endpoint = <&ptm0_out_port>; + }; + }; + + port@2 { + reg = <1>; + funnel_in_port1: endpoint { + slave-mode; + remote-endpoint = <&ptm1_out_port>; + }; + }; + + port@3 { + reg = <2>; + funnel_in_port2: endpoint { + slave-mode; + remote-endpoint = <&etm0_out_port>; + }; + }; + + /* Input port #3 is for ITM, not supported here */ + + port@4 { + reg = <4>; + funnel_in_port4: endpoint { + slave-mode; + remote-endpoint = <&etm1_out_port>; + }; + }; + + port@5 { + reg = <5>; + funnel_in_port5: endpoint { + slave-mode; + remote-endpoint = <&etm2_out_port>; + }; + }; + }; + }; + + ptm@0,2201c000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0 0x2201c000 0 0x1000>; + + cpu = <&cpu0>; + clocks = <&oscclk6a>; + clock-names = "apb_pclk"; + port { + ptm0_out_port: endpoint { + remote-endpoint = <&funnel_in_port0>; + }; + }; + }; + + ptm@0,2201d000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0 0x2201d000 0 0x1000>; + + cpu = <&cpu1>; + clocks = <&oscclk6a>; + clock-names = "apb_pclk"; + port { + ptm1_out_port: endpoint { + remote-endpoint = <&funnel_in_port1>; + }; + }; + }; + + etm@0,2203c000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0 0x2203c000 0 0x1000>; + + cpu = <&cpu2>; + clocks = <&oscclk6a>; + clock-names = "apb_pclk"; + port { + etm0_out_port: endpoint { + remote-endpoint = <&funnel_in_port2>; + }; + }; + }; + + etm@0,2203d000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0 0x2203d000 0 0x1000>; + + cpu = <&cpu3>; + clocks = <&oscclk6a>; + clock-names = "apb_pclk"; + port { + etm1_out_port: endpoint { + remote-endpoint = <&funnel_in_port4>; + }; + }; + }; + + etm@0,2203e000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0 0x2203e000 0 0x1000>; + + cpu = <&cpu4>; + clocks = <&oscclk6a>; + clock-names = "apb_pclk"; + port { + etm2_out_port: endpoint { + remote-endpoint = <&funnel_in_port5>; + }; + }; + }; + smb { compatible = "simple-bus";