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[209.132.180.67]) by mx.google.com with ESMTP id v4si3524657pdr.31.2014.10.29.01.26.34 for ; Wed, 29 Oct 2014 01:26:35 -0700 (PDT) Received-SPF: none (google.com: devicetree-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932238AbaJ2I0e (ORCPT + 4 others); Wed, 29 Oct 2014 04:26:34 -0400 Received: from mail-pd0-f171.google.com ([209.85.192.171]:38871 "EHLO mail-pd0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932102AbaJ2I0d (ORCPT ); Wed, 29 Oct 2014 04:26:33 -0400 Received: by mail-pd0-f171.google.com with SMTP id r10so2522509pdi.30 for ; Wed, 29 Oct 2014 01:26:33 -0700 (PDT) X-Received: by 10.70.38.48 with SMTP id d16mr149455pdk.79.1414571193163; Wed, 29 Oct 2014 01:26:33 -0700 (PDT) Received: from localhost.localdomain ([180.150.157.4]) by mx.google.com with ESMTPSA id ml5sm3658124pab.32.2014.10.29.01.26.28 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 29 Oct 2014 01:26:32 -0700 (PDT) From: Zhangfei Gao To: arnd@arndb.de, haifeng.yan@linaro.org, jchxue@gmail.com, xuwei5@hisilicon.com, haojian.zhuang@linaro.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Zhangfei Gao , Jiancheng Xue Subject: [PATCH v4 04/10] ARM: dts: hix5hd2: add sata node Date: Wed, 29 Oct 2014 16:25:59 +0800 Message-Id: <1414571165-23736-5-git-send-email-zhangfei.gao@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1414571165-23736-1-git-send-email-zhangfei.gao@linaro.org> References: <1414571165-23736-1-git-send-email-zhangfei.gao@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: zhangfei.gao@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.44 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Signed-off-by: Jiancheng Xue Signed-off-by: Zhangfei Gao --- arch/arm/boot/dts/hisi-x5hd2-dkb.dts | 5 +++++ arch/arm/boot/dts/hisi-x5hd2.dtsi | 20 ++++++++++++++++++++ 2 files changed, 25 insertions(+) diff --git a/arch/arm/boot/dts/hisi-x5hd2-dkb.dts b/arch/arm/boot/dts/hisi-x5hd2-dkb.dts index 0da3f3b..721b092 100644 --- a/arch/arm/boot/dts/hisi-x5hd2-dkb.dts +++ b/arch/arm/boot/dts/hisi-x5hd2-dkb.dts @@ -79,3 +79,8 @@ reg = <1>; }; }; + +&ahci { + phys = <&sata_phy>; + phy-names = "sata-phy"; +}; diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi index 4f9e8a3..d5b3a8f 100644 --- a/arch/arm/boot/dts/hisi-x5hd2.dtsi +++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi @@ -215,5 +215,25 @@ interrupts = <0 67 4>; clocks = <&clock HIX5HD2_USB_CLK>; }; + + peripheral_ctrl: syscon@a20000 { + compatible = "syscon"; + reg = <0xa20000 0x1000>; + }; + + sata_phy: phy@1900000 { + compatible = "hisilicon,hix5hd2-sata-phy"; + reg = <0x1900000 0x10000>; + #phy-cells = <0>; + hisilicon,peripheral-syscon = <&peripheral_ctrl>; + hisilicon,power-reg = <0x8 10>; + }; + + ahci: sata@1900000 { + compatible = "hisilicon,hisi-ahci"; + reg = <0x1900000 0x10000>; + interrupts = <0 70 4>; + clocks = <&clock HIX5HD2_SATA_CLK>; + }; }; };