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[85.244.65.113]) by mx.google.com with ESMTPSA id ax10sm6650879wjc.26.2015.02.27.08.36.47 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 27 Feb 2015 08:36:48 -0800 (PST) From: Ard Biesheuvel To: linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org Subject: [PATCH] ARM: advertise availability of v8 Crypto instructions Date: Fri, 27 Feb 2015 16:36:31 +0000 Message-Id: <1425054991-29951-1-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.8.3.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150227_083715_102726_A3667BE7 X-CRM114-Status: GOOD ( 10.23 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.82.49 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [74.125.82.49 listed in wl.mailspike.net] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders Cc: jorge.ramirez-ortiz@linaro.org, Ard Biesheuvel , will.deacon@arm.com, nico@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ard.biesheuvel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.175 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 When running the 32-bit ARM kernel on ARMv8 capable bare metal (e.g., 32-bit Android userland and kernel on a Cortex-A53), or as a KVM guest on a 64-bit host, we should advertise the availability of the Crypto instructions, so that userland libraries such as OpenSSL may use them. (Support for the v8 Crypto instructions in the 32-bit build was added to OpenSSL more than six months ago) This adds the ID feature bit detection, and sets elf_hwcap2 accordingly. Signed-off-by: Ard Biesheuvel --- arch/arm/kernel/setup.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index e55408e96559..8d4cb1c1c9ac 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -393,6 +393,22 @@ static void __init cpuid_init_hwcaps(void) vmsa = (read_cpuid_ext(CPUID_EXT_MMFR0) & 0xf) >> 0; if (vmsa >= 5) elf_hwcap |= HWCAP_LPAE; + + /* check for supported v8 Crypto instructions on non v7-M CPUs */ + if (cpu_architecture() == CPU_ARCH_ARMv7) { + unsigned int id = read_cpuid_ext(CPUID_EXT_ISAR5); + + switch ((id >> 4) & 0xf) { + case 2: elf_hwcap2 |= HWCAP2_PMULL; + case 1: elf_hwcap2 |= HWCAP2_AES; + } + if (((id >> 8) & 0xf) == 1) + elf_hwcap2 |= HWCAP2_SHA1; + if (((id >> 12) & 0xf) == 1) + elf_hwcap2 |= HWCAP2_SHA2; + if (((id >> 16) & 0xf) == 1) + elf_hwcap2 |= HWCAP2_CRC32; + } } static void __init elf_hwcap_fixup(void)