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[2001:1868:205::9]) by mx.google.com with ESMTPS id h13si12320735pdm.194.2015.04.20.06.04.23 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 20 Apr 2015 06:04:24 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YkBL4-00043f-3O; Mon, 20 Apr 2015 13:02:14 +0000 Received: from mail-la0-f43.google.com ([209.85.215.43]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YkBIv-0001td-Ki for linux-arm-kernel@lists.infradead.org; Mon, 20 Apr 2015 13:00:06 +0000 Received: by layy10 with SMTP id y10so126026036lay.0 for ; Mon, 20 Apr 2015 05:59:39 -0700 (PDT) X-Received: by 10.152.203.201 with SMTP id ks9mr15135469lac.49.1429534779110; Mon, 20 Apr 2015 05:59:39 -0700 (PDT) Received: from localhost.localdomain ([85.235.11.236]) by mx.google.com with ESMTPSA id n10sm4295457laa.40.2015.04.20.05.59.37 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 20 Apr 2015 05:59:38 -0700 (PDT) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, Mathieu Poirier Subject: [PATCH 09/13 v2] coresight: tpiu: retrieve and handle atclk Date: Mon, 20 Apr 2015 14:59:02 +0200 Message-Id: <1429534746-3068-9-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1429534746-3068-1-git-send-email-linus.walleij@linaro.org> References: <1429534746-3068-1-git-send-email-linus.walleij@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150420_060001_913147_24AC1CFB X-CRM114-Status: GOOD ( 17.72 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.215.43 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.215.43 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders Cc: Ulf Hansson , "Rafael J. Wysocki" , Russell King , Linus Walleij , Trollkarlen Marklund X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: linus.walleij@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.52 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 As can be seen from the datasheet of the CoreSight Components, DDI0314H page A-19 the TPIU has a clock signal apart from the AHB interconnect ("amba_pclk", that we're already handling) called ATCLK, ARM Trace Clock, that SoC implementers may provide from an entirely different clock source. So to model this correctly create an optional path for handling ATCLK alongside the PCLK so we don't break old platforms that only define PCLK ("amba_pclk") but still makes it possible for SoCs that have both clock signals (such as the DB8500) to fetch and prepare/enable/disable/ unprepare both clocks in conjunction. The ATCLK is enabled and disabled using the runtime PM callbacks. Reviewed-by: Ulf Hansson Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Rebased on the coresight git tree. - Get driver data directly from the device in runtime suspend/resume hooks and skip the intermediate conversion to AMBA device. - Added Ulf's review tag. --- drivers/hwtracing/coresight/coresight-tpiu.c | 37 ++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c index 688ba937069e..7214efd10db5 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -20,6 +20,7 @@ #include #include #include +#include #include "coresight-priv.h" @@ -50,11 +51,13 @@ /** * @base: memory mapped base address for this component. * @dev: the device entity associated to this component. + * @atclk: optional clock for the core parts of the TPIU. * @csdev: component vitals needed by the framework. */ struct tpiu_drvdata { void __iomem *base; struct device *dev; + struct clk *atclk; struct coresight_device *csdev; }; @@ -111,6 +114,7 @@ static const struct coresight_ops tpiu_cs_ops = { static int tpiu_probe(struct amba_device *adev, const struct amba_id *id) { + int ret; void __iomem *base; struct device *dev = &adev->dev; struct coresight_platform_data *pdata = NULL; @@ -131,6 +135,12 @@ static int tpiu_probe(struct amba_device *adev, const struct amba_id *id) return -ENOMEM; drvdata->dev = &adev->dev; + drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */ + if (!IS_ERR(drvdata->atclk)) { + ret = clk_prepare_enable(drvdata->atclk); + if (ret) + return ret; + } dev_set_drvdata(dev, drvdata); /* Validity for the resource is already checked by the AMBA core */ @@ -170,6 +180,32 @@ static int tpiu_remove(struct amba_device *adev) return 0; } +#ifdef CONFIG_PM +static int tpiu_runtime_suspend(struct device *dev) +{ + struct tpiu_drvdata *drvdata = dev_get_drvdata(dev); + + if (drvdata && !IS_ERR(drvdata->atclk)) + clk_disable_unprepare(drvdata->atclk); + + return 0; +} + +static int tpiu_runtime_resume(struct device *dev) +{ + struct tpiu_drvdata *drvdata = dev_get_drvdata(dev); + + if (drvdata && !IS_ERR(drvdata->atclk)) + clk_prepare_enable(drvdata->atclk); + + return 0; +} +#endif + +static const struct dev_pm_ops tpiu_dev_pm_ops = { + SET_RUNTIME_PM_OPS(tpiu_runtime_suspend, tpiu_runtime_resume, NULL) +}; + static struct amba_id tpiu_ids[] = { { .id = 0x0003b912, @@ -186,6 +222,7 @@ static struct amba_driver tpiu_driver = { .drv = { .name = "coresight-tpiu", .owner = THIS_MODULE, + .pm = &tpiu_dev_pm_ops, }, .probe = tpiu_probe, .remove = tpiu_remove,