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[209.132.180.67]) by mx.google.com with ESMTP id c17si25509184pbu.153.2015.07.07.01.43.53; Tue, 07 Jul 2015 01:43:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756701AbbGGIns (ORCPT + 29 others); Tue, 7 Jul 2015 04:43:48 -0400 Received: from mail-pa0-f53.google.com ([209.85.220.53]:33030 "EHLO mail-pa0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756650AbbGGIng (ORCPT ); Tue, 7 Jul 2015 04:43:36 -0400 Received: by pacws9 with SMTP id ws9so111244626pac.0 for ; Tue, 07 Jul 2015 01:43:35 -0700 (PDT) X-Received: by 10.66.222.161 with SMTP id qn1mr6811023pac.66.1436258615765; Tue, 07 Jul 2015 01:43:35 -0700 (PDT) Received: from zcy-ubuntu.spreadtrum.com ([175.111.195.49]) by mx.google.com with ESMTPSA id k3sm21037825pde.18.2015.07.07.01.43.32 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 07 Jul 2015 01:43:35 -0700 (PDT) From: Chunyan Zhang To: mathieu.poirier@linaro.org, gregkh@linuxfoundation.org Cc: broonie@kernel.org, serge.broslavsky@linaro.org, zhang.lyra@gmail.com, linux-arm-kernel@lists.infradead.org, linux-api@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/5] coresight-etm4x: Support context-ID tracing when PID namespace is enabled Date: Tue, 7 Jul 2015 16:41:58 +0800 Message-Id: <1436258518-9339-6-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1436258518-9339-1-git-send-email-zhang.chunyan@linaro.org> References: <1436258518-9339-1-git-send-email-zhang.chunyan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: zhang.chunyan@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.49 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Like ETTv3, ETMv4 also needs the similar modifications to support Context ID tracing when PID namespace is enabled. Signed-off-by: Chunyan Zhang --- drivers/hwtracing/coresight/coresight-etm4x.c | 21 +++++++++++++++------ drivers/hwtracing/coresight/coresight-etm4x.h | 3 +++ 2 files changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index 9afbda5..254a81a 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -506,8 +506,11 @@ static ssize_t reset_store(struct device *dev, } drvdata->ctxid_idx = 0x0; - for (i = 0; i < drvdata->numcidc; i++) + for (i = 0; i < drvdata->numcidc; i++) { drvdata->ctxid_pid[i] = 0x0; + drvdata->ctxid_vpid[i] = 0x0; + } + drvdata->ctxid_mask0 = 0x0; drvdata->ctxid_mask1 = 0x0; @@ -1825,7 +1828,7 @@ static ssize_t ctxid_pid_show(struct device *dev, spin_lock(&drvdata->spinlock); idx = drvdata->ctxid_idx; - val = (unsigned long)drvdata->ctxid_pid[idx]; + val = (unsigned long)drvdata->ctxid_vpid[idx]; spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } @@ -1835,7 +1838,7 @@ static ssize_t ctxid_pid_store(struct device *dev, const char *buf, size_t size) { u8 idx; - unsigned long val; + unsigned long vpid, pid; struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); /* @@ -1845,12 +1848,15 @@ static ssize_t ctxid_pid_store(struct device *dev, */ if (!drvdata->ctxid_size || !drvdata->numcidc) return -EINVAL; - if (kstrtoul(buf, 16, &val)) + if (kstrtoul(buf, 16, &vpid)) return -EINVAL; + pid = coresight_vpid_to_pid(vpid); + spin_lock(&drvdata->spinlock); idx = drvdata->ctxid_idx; - drvdata->ctxid_pid[idx] = (u64)val; + drvdata->ctxid_pid[idx] = (u64)pid; + drvdata->ctxid_vpid[idx] = (u64)vpid; spin_unlock(&drvdata->spinlock); return size; } @@ -2513,8 +2519,11 @@ static void etm4_init_default_data(struct etmv4_drvdata *drvdata) drvdata->addr_type[1] = ETM_ADDR_TYPE_RANGE; } - for (i = 0; i < drvdata->numcidc; i++) + for (i = 0; i < drvdata->numcidc; i++) { drvdata->ctxid_pid[i] = 0x0; + drvdata->ctxid_vpid[i] = 0x0; + } + drvdata->ctxid_mask0 = 0x0; drvdata->ctxid_mask1 = 0x0; diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h index 1e8fb36..c341002 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -266,6 +266,8 @@ * @ctxid_idx: Context ID index selector. * @ctxid_size: Size of the context ID field to consider. * @ctxid_pid: Value of the context ID comparator. + * @ctxid_vpid: Virtual PID seen by users if PID namespace is enabled, otherwise + * the same value of ctxid_pid. * @ctxid_mask0:Context ID comparator mask for comparator 0-3. * @ctxid_mask1:Context ID comparator mask for comparator 4-7. * @vmid_idx: VM ID index selector. @@ -353,6 +355,7 @@ struct etmv4_drvdata { u8 ctxid_idx; u8 ctxid_size; u64 ctxid_pid[ETMv4_MAX_CTXID_CMP]; + u64 ctxid_vpid[ETMv4_MAX_CTXID_CMP]; u32 ctxid_mask0; u32 ctxid_mask1; u8 vmid_idx;