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[82.45.1.190]) by smtp.gmail.com with ESMTPSA id c3sm4230830wja.3.2015.07.08.09.11.36 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 08 Jul 2015 09:11:37 -0700 (PDT) From: Peter Griffin To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, srinivas.kandagatla@gmail.com, maxime.coquelin@st.com, patrice.chotard@st.com, vinod.koul@intel.com, dan.j.williams@intel.com Subject: [PATCH 2/7] dmaengine: st_fdma: Add STMicroelectronics FDMA xbar DT binding documentation Date: Wed, 8 Jul 2015 17:11:23 +0100 Message-Id: <1436371888-27863-3-git-send-email-peter.griffin@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1436371888-27863-1-git-send-email-peter.griffin@linaro.org> References: <1436371888-27863-1-git-send-email-peter.griffin@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150708_091200_085837_D0268FB5 X-CRM114-Status: GOOD ( 13.01 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.212.169 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.212.169 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Cc: peter.griffin@linaro.org, devicetree@vger.kernel.org, lee.jones@linaro.org, dmaengine@vger.kernel.org, ludovic.barre@st.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.griffin@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.48 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 This patch adds the DT binding documentation for the FDMA xbar hw found on STi based chipsets from STMicroelectronics. Signed-off-by: Ludovic Barre Signed-off-by: Peter Griffin --- Documentation/devicetree/bindings/dma/st_fdma.txt | 24 +++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/st_fdma.txt b/Documentation/devicetree/bindings/dma/st_fdma.txt index 1ec7470..655ee57 100644 --- a/Documentation/devicetree/bindings/dma/st_fdma.txt +++ b/Documentation/devicetree/bindings/dma/st_fdma.txt @@ -3,6 +3,24 @@ The FDMA is a general-purpose direct memory access controller capable of supporting 16 independent DMA channels. It accepts up to 32 DMA requests. The FDMA is based on a Slim processor which require a firmware. +To increase the number of peripheral request, the FDMA crossbar can mutiplex +up to 96 peripheral requests to one of 3 fdma controlers engine. + +* FDMA crossbar + +Required properties: +- compatible : Should be "st,fdma-xbar-1.0" +- reg : Should contain XBAR registers location and length +- dma-requests : Should contain the number of peripheral request supported +- #st,fdma-xbar-cells : Must be <1> + +Example: + xbar0: fdma-xbar-mpe@0 { + compatible = "st,fdma-xbar-1.0"; + reg = <0x8e80000 0x1000>; + dma-requests = <79>; + #st,fdma-xbar-cells = <1>; + }; * FDMA Controller @@ -18,6 +36,11 @@ Required properties: See: Documentation/devicetree/bindings/clock/clock-bindings.txt +Optional properties: +- st,fdma-xbar : Allow to plug controller behind the crossbar at offset X + 1. A phandle pointing to the FDMA crossbar + 2. Output offset <2..0> + Example: fdma1: fdma-app@1 { @@ -26,6 +49,7 @@ Example: interrupts = ; dma-channels = <16>; #dma-cells = <3>; + st,fdma-xbar = <&xbar0 0>; st,fw-name = "fdma_STiH407_1.elf"; clocks = <&CLK_S_C0_FLEXGEN CLK_FDMA>, <&CLK_S_C0_FLEXGEN CLK_TX_ICN_DMU>,