From patchwork Fri Jul 10 10:45:09 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanjun Guo X-Patchwork-Id: 51030 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-la0-f69.google.com (mail-la0-f69.google.com [209.85.215.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id E6D8F2290A for ; Fri, 10 Jul 2015 10:47:45 +0000 (UTC) Received: by laar3 with SMTP id r3sf81982421laa.1 for ; Fri, 10 Jul 2015 03:47:44 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=VuxZVTALBBg5RDil07fOdmzr1IEpWH64eOP6F/oOUow=; b=TZGSwuteIDmULaks0Tox0HnxugYqHS2NKFQcfhpF9pjVlEN2CI3J66nHoWbUlq1gq/ tKJzfy+GvDiQsXcblDxv8H2q/2DsZzjMI97kWAURQo5hVbAHsdJ8y1jMSQAx0q4/5yC3 2e7Y/mY6Qt9zwr1LrQkLSvLNJA/0+O1HsFt28/bc+GJHKyIJoi/6Sg4oLrdaJUl7q4hY CrXO+Py7YO/CJOzCU/CKMI5tQCoQ/sBgpCI5Lx1mWyto7UgG0WQcRommFgZyWZbZZO+O Bg+c1nwPO1nsdVPY8q9wMH33DNKRpZ2I2mUKb0GCqwj20Oh0x5eZdKjD056CSjdpvQwY zbOQ== X-Gm-Message-State: ALoCoQnhEzQH39TE2UdVJ3lHxrsMqMZISzq6gv9Qm6AzmQm9/W83/MoJwmur05s4TQsFcnW/FiOy X-Received: by 10.112.26.5 with SMTP id h5mr10483490lbg.4.1436525264860; Fri, 10 Jul 2015 03:47:44 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.5.39 with SMTP id p7ls663316lap.104.gmail; Fri, 10 Jul 2015 03:47:44 -0700 (PDT) X-Received: by 10.112.46.130 with SMTP id v2mr12247684lbm.119.1436525264578; Fri, 10 Jul 2015 03:47:44 -0700 (PDT) Received: from mail-lb0-f175.google.com (mail-lb0-f175.google.com. [209.85.217.175]) by mx.google.com with ESMTPS id ud5si7045256lac.28.2015.07.10.03.47.44 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 10 Jul 2015 03:47:44 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.175 as permitted sender) client-ip=209.85.217.175; Received: by lblf12 with SMTP id f12so20792253lbl.2 for ; Fri, 10 Jul 2015 03:47:44 -0700 (PDT) X-Received: by 10.152.206.75 with SMTP id lm11mr18890388lac.41.1436525264216; Fri, 10 Jul 2015 03:47:44 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.108.230 with SMTP id hn6csp1288816lbb; Fri, 10 Jul 2015 03:47:43 -0700 (PDT) X-Received: by 10.66.141.74 with SMTP id rm10mr39951564pab.96.1436525256374; Fri, 10 Jul 2015 03:47:36 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id nv10si14053794pdb.82.2015.07.10.03.47.35; Fri, 10 Jul 2015 03:47:36 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753852AbbGJKrd (ORCPT + 6 others); Fri, 10 Jul 2015 06:47:33 -0400 Received: from mail-pd0-f175.google.com ([209.85.192.175]:36572 "EHLO mail-pd0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754105AbbGJKp4 (ORCPT ); Fri, 10 Jul 2015 06:45:56 -0400 Received: by pdjr16 with SMTP id r16so21189196pdj.3 for ; Fri, 10 Jul 2015 03:45:54 -0700 (PDT) X-Received: by 10.68.139.136 with SMTP id qy8mr40831269pbb.89.1436525154153; Fri, 10 Jul 2015 03:45:54 -0700 (PDT) Received: from localhost (211-79-127-12.veetime.com. [211.79.127.12]) by smtp.googlemail.com with ESMTPSA id b12sm8750819pbu.20.2015.07.10.03.45.52 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 10 Jul 2015 03:45:53 -0700 (PDT) From: Hanjun Guo To: Marc Zyngier , Jason Cooper , Will Deacon , Catalin Marinas , "Rafael J. Wysocki" Cc: Thomas Gleixner , Jiang Liu , Lorenzo Pieralisi , Arnd Bergmann , Tomasz Nowicki , Grant Likely , Mark Brown , Wei Huang , linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linaro-acpi@lists.linaro.org, Hanjun Guo Subject: [PATCH v3 3/8] irqchip / GIC / ACPI: Use IRQCHIP_ACPI_DECLARE to simplify GICv2 init code Date: Fri, 10 Jul 2015 18:45:09 +0800 Message-Id: <1436525114-14425-4-git-send-email-hanjun.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1436525114-14425-1-git-send-email-hanjun.guo@linaro.org> References: <1436525114-14425-1-git-send-email-hanjun.guo@linaro.org> Sender: linux-acpi-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-acpi@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: hanjun.guo@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.175 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , As the ACPI self-probe infrastructure for irqchip is ready, we use the infrastructure to simplify GICv2 init code. acpi_irqchip_init() is renamed as acpi_irq_init() to replace the previous hardcode version of acpi_irq_init() in asm/irq.h, also cleanup the code which previously calling the GIC driver manually in arch/arm64/kernel/acpi.c. >From now on, GIC init calls reside in theirs drivers only. This means the code becomes cleaner and it is not spread outside irqchip driver. Signed-off-by: Hanjun Guo --- arch/arm64/include/asm/acpi.h | 1 - arch/arm64/include/asm/irq.h | 13 ------------- arch/arm64/kernel/acpi.c | 25 ------------------------- drivers/irqchip/irq-gic-acpi.c | 2 +- drivers/irqchip/irq-gic.c | 3 ++- include/linux/acpi_irq.h | 4 +++- include/linux/irqchip/arm-gic-acpi.h | 9 +-------- 7 files changed, 7 insertions(+), 50 deletions(-) diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index ed7e212..05656fc 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -12,7 +12,6 @@ #ifndef _ASM_ACPI_H #define _ASM_ACPI_H -#include #include #include diff --git a/arch/arm64/include/asm/irq.h b/arch/arm64/include/asm/irq.h index bbb251b..94c5367 100644 --- a/arch/arm64/include/asm/irq.h +++ b/arch/arm64/include/asm/irq.h @@ -1,8 +1,6 @@ #ifndef __ASM_IRQ_H #define __ASM_IRQ_H -#include - #include struct pt_regs; @@ -10,15 +8,4 @@ struct pt_regs; extern void migrate_irqs(void); extern void set_handle_irq(void (*handle_irq)(struct pt_regs *)); -static inline void acpi_irq_init(void) -{ - /* - * Hardcode ACPI IRQ chip initialization to GICv2 for now. - * Proper irqchip infrastructure will be implemented along with - * incoming GICv2m|GICv3|ITS bits. - */ - acpi_gic_init(); -} -#define acpi_irq_init acpi_irq_init - #endif diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c index 19de753..d6463bb 100644 --- a/arch/arm64/kernel/acpi.c +++ b/arch/arm64/kernel/acpi.c @@ -205,28 +205,3 @@ void __init acpi_boot_table_init(void) disable_acpi(); } } - -void __init acpi_gic_init(void) -{ - struct acpi_table_header *table; - acpi_status status; - acpi_size tbl_size; - int err; - - if (acpi_disabled) - return; - - status = acpi_get_table_with_size(ACPI_SIG_MADT, 0, &table, &tbl_size); - if (ACPI_FAILURE(status)) { - const char *msg = acpi_format_exception(status); - - pr_err("Failed to get MADT table, %s\n", msg); - return; - } - - err = gic_v2_acpi_init(table); - if (err) - pr_err("Failed to initialize GIC IRQ controller"); - - early_acpi_os_unmap_memory((char *)table, tbl_size); -} diff --git a/drivers/irqchip/irq-gic-acpi.c b/drivers/irqchip/irq-gic-acpi.c index e003a89..b87a581 100644 --- a/drivers/irqchip/irq-gic-acpi.c +++ b/drivers/irqchip/irq-gic-acpi.c @@ -119,7 +119,7 @@ irqchip_acpi_match_end __used __section(__irqchip_acpi_table_end); extern struct acpi_table_id __irqchip_acpi_table[]; -void __init acpi_irqchip_init(void) +void __init acpi_irq_init(void) { struct acpi_table_id *id; diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 8d7e1c8..58a7112 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -1086,7 +1086,7 @@ gic_acpi_parse_madt_distributor(struct acpi_subtable_header *header, return 0; } -int __init +static int __init gic_v2_acpi_init(struct acpi_table_header *table) { void __iomem *cpu_base, *dist_base; @@ -1142,4 +1142,5 @@ gic_v2_acpi_init(struct acpi_table_header *table) acpi_irq_model = ACPI_IRQ_MODEL_GIC; return 0; } +IRQCHIP_ACPI_DECLARE(gic_v2, ACPI_MADT_GIC_VERSION_V2, gic_v2_acpi_init); #endif diff --git a/include/linux/acpi_irq.h b/include/linux/acpi_irq.h index f10c872..4c0e108 100644 --- a/include/linux/acpi_irq.h +++ b/include/linux/acpi_irq.h @@ -3,7 +3,9 @@ #include -#ifndef acpi_irq_init +#ifdef CONFIG_ACPI +void acpi_irq_init(void); +#else static inline void acpi_irq_init(void) { } #endif diff --git a/include/linux/irqchip/arm-gic-acpi.h b/include/linux/irqchip/arm-gic-acpi.h index 13bc676..56cd82c 100644 --- a/include/linux/irqchip/arm-gic-acpi.h +++ b/include/linux/irqchip/arm-gic-acpi.h @@ -21,12 +21,5 @@ #define ACPI_GIC_CPU_IF_MEM_SIZE (SZ_8K) #define ACPI_GICV3_DIST_MEM_SIZE (SZ_64K) -struct acpi_table_header; - -int gic_v2_acpi_init(struct acpi_table_header *table); -void acpi_gic_init(void); -#else -static inline void acpi_gic_init(void) { } -#endif - +#endif /* CONFIG_ACPI */ #endif /* ARM_GIC_ACPI_H_ */