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[209.132.180.67]) by mx.google.com with ESMTP id c20si100931igv.2.2015.09.30.04.09.04; Wed, 30 Sep 2015 04:09:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755326AbbI3LJD (ORCPT + 7 others); Wed, 30 Sep 2015 07:09:03 -0400 Received: from szxga01-in.huawei.com ([58.251.152.64]:62867 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755159AbbI3LJB (ORCPT ); Wed, 30 Sep 2015 07:09:01 -0400 Received: from 172.24.1.47 (EHLO szxeml433-hub.china.huawei.com) ([172.24.1.47]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CWA84146; Wed, 30 Sep 2015 19:05:24 +0800 (CST) Received: from localhost (10.67.54.136) by szxeml433-hub.china.huawei.com (10.82.67.210) with Microsoft SMTP Server id 14.3.235.1; Wed, 30 Sep 2015 19:05:13 +0800 From: Fei Wang To: , , , , , , , , , , , , , , CC: , , , , , , , , , , , , Subject: [PATCH 8/8] arm64: dts: Add Hi6220 mtcmos regulator node Date: Wed, 30 Sep 2015 19:05:11 +0800 Message-ID: <1443611111-3196-9-git-send-email-w.f@huawei.com> X-Mailer: git-send-email 2.6.0.windows.1 In-Reply-To: <1443611111-3196-1-git-send-email-w.f@huawei.com> References: <1443611111-3196-1-git-send-email-w.f@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.54.136] X-CFilter-Loop: Reflected Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: w.f@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.45 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This patch add mtcmos regulator dts file for Hi6220 SoC. Signed-off-by: Fei Wang --- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 40f895b..9b1a6ed 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -167,6 +167,27 @@ clocks = <&ao_ctrl 36>, <&ao_ctrl 36>; clock-names = "uartclk", "apb_pclk"; }; + + mtcmos { + compatible = "hisilicon,hi6220-mtcmos-driver"; + hisilicon,mtcmos-steady-us = <10>; + hisilicon,mtcmos-sc-on-base = <0xf7800000>; + hisilicon,mtcmos-acpu-on-base = <0xf65a0000>; + + mtcmos1: regulator@a1{ + regulator-name = "G3D_PD_VDD"; + regulator-compatible = "mtcmos1"; + hisilicon,ctrl-regs = <0x830 0x834 0x83c>; + hisilicon,ctrl-data = <1 0x1>; + }; + + mtcmos2: regulator@a2{ + regulator-name = "SOC_MED"; + regulator-compatible = "mtcmos2"; + hisilicon,ctrl-regs = <0x830 0x834 0x83c>; + hisilicon,ctrl-data = <2 0x1>; + }; + }; }; pmic: pmic@F8000000 {