From patchwork Thu Oct 1 17:04:22 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 54386 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wi0-f199.google.com (mail-wi0-f199.google.com [209.85.212.199]) by patches.linaro.org (Postfix) with ESMTPS id 0DDFD23010 for ; Thu, 1 Oct 2015 17:07:50 +0000 (UTC) Received: by wicuu12 with SMTP id uu12sf10960953wic.2 for ; Thu, 01 Oct 2015 10:07:49 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:subject:date:message-id :in-reply-to:references:precedence:list-id:list-unsubscribe :list-archive:list-post:list-help:list-subscribe:cc:mime-version :content-type:content-transfer-encoding:sender:errors-to :x-original-sender:x-original-authentication-results:mailing-list; bh=So0QQADS5mGzuD6H+iXBkGn21fZApvpFSEuQkyRtMgA=; b=TixHcjhAAOnN1strHOkHvg5034rQt0octB7ZznhP+JkXfINbqDSsdyPSdnRHUZl4M7 3TIdh4qlBsvWRpwmlWIgSeIsTXHQX4l8XEet4A0MbKV3/sqPuMZuM1Y7aYyEdVv7AYar ELQvIV47ERU3np1tMINq/sQOouc2HTTda0KqNO4krquRhwCclzNsXKNCbecMSu9yeNaB 1vJ2SZqQ0Q5VmPWYHkN43KV//WKbfh95ggpv1F/eqOGxWsOmBen6Z1cqnT+ve7ucWoZU YFmCcCmtIWsCtcs8+va9Rk9sD78ZcnZ5JLbDIofsQ/f6VrkqMZrcB11VUGoXplXKL5XN pqaw== X-Gm-Message-State: ALoCoQkO48WfwufvfA3XfZ44LyiJutaCfPtBhxJqkQacuTQlCpV5S+DQKBpDCVYw1bB5QJN7gyPO X-Received: by 10.112.169.34 with SMTP id ab2mr1620265lbc.23.1443719269361; Thu, 01 Oct 2015 10:07:49 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.25.150.148 with SMTP id y142ls138849lfd.59.gmail; Thu, 01 Oct 2015 10:07:49 -0700 (PDT) X-Received: by 10.25.19.193 with SMTP id 62mr2311145lft.68.1443719269227; Thu, 01 Oct 2015 10:07:49 -0700 (PDT) Received: from mail-la0-f43.google.com (mail-la0-f43.google.com. [209.85.215.43]) by mx.google.com with ESMTPS id z9si3321953lbu.161.2015.10.01.10.07.49 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 01 Oct 2015 10:07:49 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.43 as permitted sender) client-ip=209.85.215.43; Received: by lahh2 with SMTP id h2so78806443lah.0 for ; Thu, 01 Oct 2015 10:07:49 -0700 (PDT) X-Received: by 10.25.40.130 with SMTP id o124mr2187767lfo.41.1443719269088; Thu, 01 Oct 2015 10:07:49 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.59.35 with SMTP id w3csp730153lbq; Thu, 1 Oct 2015 10:07:48 -0700 (PDT) X-Received: by 10.180.8.106 with SMTP id q10mr4196556wia.92.1443719268300; Thu, 01 Oct 2015 10:07:48 -0700 (PDT) Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id go6si4809478wib.82.2015.10.01.10.07.48 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 01 Oct 2015 10:07:48 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZhhJA-0004Cc-RI; Thu, 01 Oct 2015 17:06:16 +0000 Received: from mail-wi0-f171.google.com ([209.85.212.171]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZhhI0-00021v-B7 for linux-arm-kernel@lists.infradead.org; Thu, 01 Oct 2015 17:05:08 +0000 Received: by wicgb1 with SMTP id gb1so39126824wic.1 for ; Thu, 01 Oct 2015 10:04:46 -0700 (PDT) X-Received: by 10.180.23.71 with SMTP id k7mr4361566wif.11.1443719085998; Thu, 01 Oct 2015 10:04:45 -0700 (PDT) Received: from localhost.localdomain ([83.225.55.104]) by smtp.gmail.com with ESMTPSA id x9sm7036760wjf.44.2015.10.01.10.04.43 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 01 Oct 2015 10:04:45 -0700 (PDT) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux-efi@vger.kernel.org, matt.fleming@intel.com, linux@arm.linux.org.uk, will.deacon@arm.com, grant.likely@linaro.org, leif.lindholm@linaro.org, roy.franz@linaro.org, mark.rutland@arm.com, catalin.marinas@arm.com Subject: [PATCH 8/9] ARM: wire up UEFI init and runtime support Date: Thu, 1 Oct 2015 19:04:22 +0200 Message-Id: <1443719063-6832-9-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1443719063-6832-1-git-send-email-ard.biesheuvel@linaro.org> References: <1443719063-6832-1-git-send-email-ard.biesheuvel@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151001_100504_914516_8D7F4AED X-CRM114-Status: GOOD ( 26.48 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.212.171 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.212.171 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Cc: ryan.harkin@linaro.org, Ard Biesheuvel , msalter@redhat.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ard.biesheuvel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.43 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 This adds support to the kernel proper for booting via UEFI. It shares most of the code with arm64, so this patch mostly just wires it up for use with ARM. Note that this does not include the EFI stub, it is added in a subsequent patch. Signed-off-by: Ard Biesheuvel --- arch/arm/include/asm/efi.h | 69 +++++++++++++++++++ arch/arm/kernel/Makefile | 1 + arch/arm/kernel/devtree.c | 4 ++ arch/arm/kernel/efi.c | 71 ++++++++++++++++++++ arch/arm/kernel/setup.c | 3 + arch/arm/mm/init.c | 14 +++- drivers/firmware/efi/libstub/arm-stub.c | 4 +- 7 files changed, 164 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/efi.h b/arch/arm/include/asm/efi.h new file mode 100644 index 000000000000..2622322f1135 --- /dev/null +++ b/arch/arm/include/asm/efi.h @@ -0,0 +1,69 @@ +/* + * Copyright (C) 2015 Linaro Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARM_EFI_H +#define __ASM_ARM_EFI_H + +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_EFI +void efi_init(void); +void efi_parse_fdt(void *fdt); + +int efi_create_mapping(struct mm_struct *mm, efi_memory_desc_t *md); + +#define efi_call_virt(f, ...) \ +({ \ + efi_##f##_t *__f; \ + efi_status_t __s; \ + \ + efi_virtmap_load(); \ + __f = efi.systab->runtime->f; \ + __s = __f(__VA_ARGS__); \ + efi_virtmap_unload(); \ + __s; \ +}) + +#define __efi_call_virt(f, ...) \ +({ \ + efi_##f##_t *__f; \ + \ + efi_virtmap_load(); \ + __f = efi.systab->runtime->f; \ + __f(__VA_ARGS__); \ + efi_virtmap_unload(); \ +}) + +static inline void efi_set_pgd(struct mm_struct *mm) +{ + if (unlikely(mm->context.vmalloc_seq != init_mm.context.vmalloc_seq)) + __check_vmalloc_seq(mm); + + cpu_switch_mm(mm->pgd, mm); + + flush_tlb_all(); + if (icache_is_vivt_asid_tagged()) + __flush_icache_all(); +} + +void efi_virtmap_load(void); +void efi_virtmap_unload(void); + +#else +#define efi_init() +#define efi_parse_fdt(x) +#endif /* CONFIG_EFI */ + +#endif /* _ASM_ARM_EFI_H */ diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index af9e59bf3831..c90f4a70d646 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -77,6 +77,7 @@ CFLAGS_pj4-cp0.o := -marm AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt obj-$(CONFIG_ARM_CPU_TOPOLOGY) += topology.o obj-$(CONFIG_VDSO) += vdso.o +obj-$(CONFIG_EFI) += efi.o ifneq ($(CONFIG_ARCH_EBSA110),y) obj-y += io.o diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c index 11c54de9f8cf..c3439eaf46ce 100644 --- a/arch/arm/kernel/devtree.c +++ b/arch/arm/kernel/devtree.c @@ -9,6 +9,7 @@ */ #include +#include #include #include #include @@ -21,6 +22,7 @@ #include #include +#include #include #include #include @@ -215,6 +217,8 @@ const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys) if (!dt_phys || !early_init_dt_verify(phys_to_virt(dt_phys))) return NULL; + efi_parse_fdt(phys_to_virt(dt_phys)); + mdesc = of_flat_dt_match_machine(mdesc_best, arch_get_next_mach); if (!mdesc) { diff --git a/arch/arm/kernel/efi.c b/arch/arm/kernel/efi.c new file mode 100644 index 000000000000..ef4dab987da5 --- /dev/null +++ b/arch/arm/kernel/efi.c @@ -0,0 +1,71 @@ +/* + * Copyright (C) 2015 Linaro Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include + +static int set_efi_permissions(pte_t *ptep, pgtable_t token, unsigned long addr, + void *data) +{ + pteval_t *prot_val = data; + pte_t pte = *ptep; + + pte = set_pte_bit(pte, __pgprot(*prot_val)); + set_pte_ext(ptep, pte, 0); + return 0; +} + +int __init efi_create_mapping(struct mm_struct *mm, efi_memory_desc_t *md) +{ + struct map_desc desc = { + .virtual = md->virt_addr, + .pfn = __phys_to_pfn(md->phys_addr), + .length = md->num_pages * EFI_PAGE_SIZE, + }; + pteval_t prot_val = 0; + int ret = 0; + + /* + * Order is important here: memory regions may have all of the + * bits below set (and usually do), and any memory that has the + * EFI_MEMORY_WB bit set may be covered by the linear mapping + * and mapped write-back cacheable already. So check the + * EFI_MEMORY_WB bit first. + */ + if (md->attribute & EFI_MEMORY_WB) + desc.type = MT_MEMORY_RWX; + else if (md->attribute & EFI_MEMORY_WT) + desc.type = MT_MEMORY_RWX_NONCACHED; + else if (md->attribute & EFI_MEMORY_WC) + desc.type = MT_DEVICE_WC; + else if (md->attribute & EFI_MEMORY_UC) + desc.type = MT_DEVICE; + else + return -EINVAL; + + create_mapping_late(mm, &desc); + + if (md->attribute & EFI_MEMORY_RO) + prot_val |= L_PTE_RDONLY; + if (md->attribute & EFI_MEMORY_XP) + prot_val |= L_PTE_XN; + + /* + * MT_DEVICE[_WC] implies XN, so no need to set it again. + */ + if (desc.type == MT_DEVICE_WC || desc.type == MT_DEVICE) + prot_val &= ~L_PTE_XN; + + if (prot_val != 0) + ret = apply_to_page_range(mm, desc.virtual, desc.length, + set_efi_permissions, &prot_val); + + return ret; +} diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 5df2bca57c42..b341b1c3b2fa 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -7,6 +7,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ +#include #include #include #include @@ -37,6 +38,7 @@ #include #include #include +#include #include #include #include @@ -966,6 +968,7 @@ void __init setup_arch(char **cmdline_p) early_paging_init(mdesc); #endif setup_dma_zone(mdesc); + efi_init(); sanity_check_meminfo(); arm_memblock_init(mdesc); diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 1c667c6804a6..43df6a23689b 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c @@ -8,6 +8,7 @@ * published by the Free Software Foundation. */ #include +#include #include #include #include @@ -24,6 +25,7 @@ #include #include +#include #include #include #include @@ -269,7 +271,8 @@ void __init arm_memblock_init(const struct machine_desc *mdesc) mdesc->reserve(); early_init_fdt_reserve_self(); - early_init_fdt_scan_reserved_mem(); + if (!efi_enabled(EFI_MEMMAP)) + early_init_fdt_scan_reserved_mem(); /* reserve memory for DMA contiguous allocations */ dma_contiguous_reserve(arm_dma_limit); @@ -751,3 +754,12 @@ static int __init keepinitrd_setup(char *__unused) __setup("keepinitrd", keepinitrd_setup); #endif + +void __init early_init_dt_add_memory_arch(u64 base, u64 size) +{ + /* + * Ignore DT memory nodes if we are booting via UEFI. + */ + if (!efi_enabled(EFI_MEMMAP)) + early_init_dt_add_memory(base, size); +} diff --git a/drivers/firmware/efi/libstub/arm-stub.c b/drivers/firmware/efi/libstub/arm-stub.c index 950c87f5d279..3397902e4040 100644 --- a/drivers/firmware/efi/libstub/arm-stub.c +++ b/drivers/firmware/efi/libstub/arm-stub.c @@ -303,8 +303,10 @@ fail: * The value chosen is the largest non-zero power of 2 suitable for this purpose * both on 32-bit and 64-bit ARM CPUs, to maximize the likelihood that it can * be mapped efficiently. + * Since 32-bit ARM could potentially execute with a 1G/3G user/kernel split, + * map everything below 1 GB. */ -#define EFI_RT_VIRTUAL_BASE 0x40000000 +#define EFI_RT_VIRTUAL_BASE SZ_512M static int cmp_mem_desc(const void *l, const void *r) {