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Poulose" To: linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will.deacon@arm.com, mark.rutland@arm.com, dave.martin@arm.com, Vladimir.Murzin@arm.com, steve.capper@linaro.org, linux-kernel@vger.kernel.org, ard.biesheuvel@linaro.org, james.morse@arm.com, marc.zyngier@arm.com, christoffer.dall@linaro.org, andre.przywara@arm.com, edward.nevill@linaro.org, aph@redhat.com, ryan.arnold@linaro.org, "Suzuki K. Poulose" Subject: [PATCH v3 24/24] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs Date: Tue, 13 Oct 2015 18:22:32 +0100 Message-Id: <1444756952-31145-25-git-send-email-suzuki.poulose@arm.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1444756952-31145-1-git-send-email-suzuki.poulose@arm.com> References: <1444756952-31145-1-git-send-email-suzuki.poulose@arm.com> X-OriginalArrivalTime: 13 Oct 2015 17:23:07.0475 (UTC) FILETIME=[D37F0A30:01D105DB] X-MC-Unique: CtvDyr8lRTqigPWs00wPZQ-11 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: linux-kernel-owner@vger.kernel.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.171 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Steve Capper It can be useful for JIT software to be aware of MIDR_EL1 and REVIDR_EL1 to ascertain the presence of any core errata that could affect codegen. This patch exposes these registers through sysfs: /sys/devices/system/cpu/cpu$ID/identification/midr /sys/devices/system/cpu/cpu$ID/identification/revidr where $ID is the cpu number. For big.LITTLE systems, one can have a mixture of cores (e.g. Cortex A53 and Cortex A57), thus all CPUs need to be enumerated. If the kernel does not have valid information to populate these entries with, an empty string is returned to userspace. Signed-off-by: Steve Capper Signed-off-by: Suzuki K. Poulose --- Changes since V2: - Fix errno for failures (Spotted-by: Russell King) - Roll back, if we encounter a missing cpu device - Return error for access to registers of CPUs not present. --- arch/arm64/include/asm/cpu.h | 1 + arch/arm64/kernel/cpuinfo.c | 69 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 70 insertions(+) diff --git a/arch/arm64/include/asm/cpu.h b/arch/arm64/include/asm/cpu.h index b5e9cee..bb1b0cf 100644 --- a/arch/arm64/include/asm/cpu.h +++ b/arch/arm64/include/asm/cpu.h @@ -29,6 +29,7 @@ struct cpuinfo_arm64 { u32 reg_cntfrq; u32 reg_dczid; u32 reg_midr; + u32 reg_revidr; u64 reg_id_aa64dfr0; u64 reg_id_aa64dfr1; diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c index 52331ff..349ebf7 100644 --- a/arch/arm64/kernel/cpuinfo.c +++ b/arch/arm64/kernel/cpuinfo.c @@ -199,6 +199,7 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info) info->reg_ctr = read_cpuid_cachetype(); info->reg_dczid = read_cpuid(DCZID_EL0); info->reg_midr = read_cpuid_id(); + info->reg_revidr = read_cpuid(REVIDR_EL1); info->reg_id_aa64dfr0 = read_cpuid(ID_AA64DFR0_EL1); info->reg_id_aa64dfr1 = read_cpuid(ID_AA64DFR1_EL1); @@ -247,3 +248,71 @@ void __init cpuinfo_store_boot_cpu(void) boot_cpu_data = *info; init_cpu_features(&boot_cpu_data); } + +#define CPUINFO_ATTR_RO(_name) \ + static ssize_t show_##_name (struct device *dev, \ + struct device_attribute *attr, char *buf) \ + { \ + struct cpuinfo_arm64 *info = &per_cpu(cpu_data, dev->id); \ + if (!cpu_present(dev->id)) \ + return -ENODEV; \ + \ + if (info->reg_midr) \ + return sprintf(buf, "0x%016x\n", info->reg_##_name); \ + else \ + return 0; \ + } \ + static DEVICE_ATTR(_name, 0444, show_##_name, NULL) + +CPUINFO_ATTR_RO(midr); +CPUINFO_ATTR_RO(revidr); + +static struct attribute *cpuregs_attrs[] = { + &dev_attr_midr.attr, + &dev_attr_revidr.attr, + NULL +}; + +static struct attribute_group cpuregs_attr_group = { + .attrs = cpuregs_attrs, + .name = "identification" +}; + +static int __init cpuinfo_regs_init(void) +{ + int cpu, finalcpu, ret; + struct device *dev; + + for_each_present_cpu(cpu) { + dev = get_cpu_device(cpu); + + if (!dev) { + ret = -ENODEV; + break; + } + + ret = sysfs_create_group(&dev->kobj, &cpuregs_attr_group); + if (ret) + break; + } + + if (!ret) + return 0; + /* + * We were unable to put down sysfs groups for all the CPUs, revert + * all the groups we have placed down s.t. none are visible. + * Otherwise we could give a misleading picture of what's present. + */ + finalcpu = cpu; + for_each_present_cpu(cpu) { + if (cpu == finalcpu) + break; + dev = get_cpu_device(cpu); + if (dev) + sysfs_remove_group(&dev->kobj, &cpuregs_attr_group); + } + + return ret; +} + +device_initcall(cpuinfo_regs_init);