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[2001:1868:205::9]) by mx.google.com with ESMTPS id e65si22744925pfd.212.2016.04.21.01.08.47 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Apr 2016 01:08:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@jms.id.au; spf=pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) smtp.mailfrom=linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1at9eM-0007gj-Co; Thu, 21 Apr 2016 08:07:46 +0000 Received: from mail-pa0-x229.google.com ([2607:f8b0:400e:c03::229]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1at9cI-0004rO-95 for linux-arm-kernel@lists.infradead.org; Thu, 21 Apr 2016 08:05:40 +0000 Received: by mail-pa0-x229.google.com with SMTP id er2so26722872pad.3 for ; Thu, 21 Apr 2016 01:05:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jms.id.au; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=PcNlkHJhdhJ38eJvjdhgp0sGhu+Xo0VYPOR5+6+ihAg=; b=Mw2iRLr8HPPoyvTE9jEZHLtyY5YQdKoQx8hqWSHxS3PpstHeealObLWe937hpX/3Ku lUEQF4aWG+SbiGZtBLKPwd2eqEEGVoaWb+j0M4b/3kblKFqTXSUQTEn6RJoQbq4vQKtC UthA7UvyPrhclrD4ojQhJwRRtAVAdLqgKb+hU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=PcNlkHJhdhJ38eJvjdhgp0sGhu+Xo0VYPOR5+6+ihAg=; b=ZI0COIXSdJNkGo00mjxa9GIgIHMNHgDyEXWLlltk6Dkqo6tmW90seyZW6fCEEJ44GX UljeQ29NUHx/5sRKe5CIl9ySJjpRH9PAKjVs0amyJ2mfMzBCclx56I7403eZf7+9JjBo VXMMB96ekUYV/H7XN69jHDivacMtJfpdr71PENzTYISxoXZjp0PxaLEQjrHyXEWYuS1a bFn7DUUQUnTODacTI7q7mE0vqYyWmqyvXqGFVVzYsXDzG0DJ7tAjam0+uKghIvGCG/E2 6JRGgROLbtDzOZWy/+9ZzU4eBHPKK6HS6cUj5YUZuqhBDAqjT5FcaBySPLlECaVUq3A+ ZG/g== X-Gm-Message-State: AOPr4FV4XLW3yoBOuwnDFlRgZ4yN9G6XNgz0k+LQj87dk/i4/v6x9IWPBHGU70SjOrgc6Q== X-Received: by 10.66.255.65 with SMTP id ao1mr18740532pad.38.1461225917836; Thu, 21 Apr 2016 01:05:17 -0700 (PDT) Received: from icarus.au.ibm.com ([203.0.153.9]) by smtp.gmail.com with ESMTPSA id uw2sm2650897pac.10.2016.04.21.01.05.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 21 Apr 2016 01:05:14 -0700 (PDT) From: Joel Stanley To: linux-arm-kernel@lists.infradead.org, arnd@arndb.de Subject: [PATCH v2 10/11] arm: Add Aspeed machine Date: Thu, 21 Apr 2016 17:34:08 +0930 Message-Id: <1461225849-28074-11-git-send-email-joel@jms.id.au> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1461225849-28074-1-git-send-email-joel@jms.id.au> References: <1461225849-28074-1-git-send-email-joel@jms.id.au> In-Reply-To: <1460627269-21721-1-git-send-email-joel@jms.id.au> References: <1460627269-21721-1-git-send-email-joel@jms.id.au> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160421_010538_424818_38812C66 X-CRM114-Status: GOOD ( 21.15 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2607:f8b0:400e:c03:0:0:0:229 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: benh@kernel.crashing.org, jk@ozlabs.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org Aspeed devices are a common Baseboard Management Controller (BMC) system on chip containing an ARM9 or ARM11 core, off-chip DDR RAM and support for a large number of peripherals. This patch adds basic support for the ast2400 and ast2500 machines, capable of booting to a prompt in QEMU (-M palmetto-bmc), on an Palmetto OpenPower development machine, and on the ast2500 EVB. Signed-off-by: Joel Stanley --- MAINTAINERS | 8 +++++ arch/arm/Kconfig | 2 ++ arch/arm/Makefile | 1 + arch/arm/mach-aspeed/Kconfig | 28 +++++++++++++++ arch/arm/mach-aspeed/Makefile | 3 ++ arch/arm/mach-aspeed/aspeed.c | 83 +++++++++++++++++++++++++++++++++++++++++++ 6 files changed, 125 insertions(+) create mode 100644 arch/arm/mach-aspeed/Kconfig create mode 100644 arch/arm/mach-aspeed/Makefile create mode 100644 arch/arm/mach-aspeed/aspeed.c -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/MAINTAINERS b/MAINTAINERS index 61a323a6b2cf..d0a1962f7753 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -975,6 +975,14 @@ F: arch/arm/mach-artpec F: arch/arm/boot/dts/artpec6* F: drivers/clk/clk-artpec6.c +ARM/ASPEED MACHINE SUPPORT +M: Joel Stanley +S: Maintained +F: arch/arm/mach-aspeed/ +F: arch/arm/boot/dts/aspeed-* +F: arch/arm/boot/dts/ast2400.dtsi +F: drivers/*/*aspeed* + ARM/ATMEL AT91RM9200, AT91SAM9 AND SAMA5 SOC SUPPORT M: Nicolas Ferre M: Alexandre Belloni diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index cdfa6c2b7626..c4512f6b77f6 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -775,6 +775,8 @@ source "arch/arm/mach-meson/Kconfig" source "arch/arm/mach-moxart/Kconfig" +source "arch/arm/mach-aspeed/Kconfig" + source "arch/arm/mach-mv78xx0/Kconfig" source "arch/arm/mach-imx/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 8c3ce2ac44c4..8ab09fb78e1c 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -184,6 +184,7 @@ machine-$(CONFIG_ARCH_LPC32XX) += lpc32xx machine-$(CONFIG_ARCH_MESON) += meson machine-$(CONFIG_ARCH_MMP) += mmp machine-$(CONFIG_ARCH_MOXART) += moxart +machine-$(CONFIG_ARCH_ASPEED) += aspeed machine-$(CONFIG_ARCH_MV78XX0) += mv78xx0 machine-$(CONFIG_ARCH_MVEBU) += mvebu machine-$(CONFIG_ARCH_MXC) += imx diff --git a/arch/arm/mach-aspeed/Kconfig b/arch/arm/mach-aspeed/Kconfig new file mode 100644 index 000000000000..30bafc0bbd8b --- /dev/null +++ b/arch/arm/mach-aspeed/Kconfig @@ -0,0 +1,28 @@ +menuconfig ARCH_ASPEED + bool "Aspeed BMC architectures" + select OF + select SRAM + help + Say Y here if you want to run your kernel on hardware with an + ASpeed BMC SoC. + +if ARCH_ASPEED + +config MACH_AST_G4 + bool "Aspeed SoC 4th Generation" if ARCH_MULTI_V5 + depends on ARCH_ASPEED + select CPU_ARM926T + help + Say yes if you intend to run on an Aspeed ast2400 or similar + fourth generation BMCs, such as those used by OpenPower Power8 + systems. + +config MACH_AST_G5 + bool "Aspeed SoC 5th Generation" if ARCH_MULTI_V6 + depends on ARCH_ASPEED + select CPU_V6 + help + Say yes if you intend to run on an Aspeed ast2500 or similar + fifth generation Aspeed BMCs. + +endif diff --git a/arch/arm/mach-aspeed/Makefile b/arch/arm/mach-aspeed/Makefile new file mode 100644 index 000000000000..3a4f025dd520 --- /dev/null +++ b/arch/arm/mach-aspeed/Makefile @@ -0,0 +1,3 @@ +# Object file lists. + +obj-$(CONFIG_ARCH_ASPEED) += aspeed.o diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c new file mode 100644 index 000000000000..822939113d95 --- /dev/null +++ b/arch/arm/mach-aspeed/aspeed.c @@ -0,0 +1,83 @@ +/* + * Copyright IBM Corporation 2016 + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define AST_BASE_WDT 0x1E785000 /* Watchdog Timer (WDT) */ +#define AST_BASE_SCU 0x1E6E2000 /* System Control Unit (SCU) */ + +static void __init aspeed_dt_init(void) +{ + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); +} + +#define AST_IO_VA 0xf0000000 +#define AST_IO_PA 0x1e600000 +#define AST_IO_SZ 0x00200000 + +#define AST_IO(__pa) ((void __iomem *)(((__pa) & 0x001fffff) | AST_IO_VA)) + +static struct map_desc aspeed_io_desc[] __initdata __maybe_unused = { + { + .virtual = AST_IO_VA, + .pfn = __phys_to_pfn(AST_IO_PA), + .length = AST_IO_SZ, + .type = MT_DEVICE + }, +}; + +#define SCU_PASSWORD 0x1688A8A8 + +static void __init aspeed_init_early(void) +{ + u32 reg; + + /* + * Unlock SCU + */ + writel(SCU_PASSWORD, AST_IO(AST_BASE_SCU)); + + /* We enable the UART clock divisor in the SCU's misc control + * register, as the baud rates in aspeed.dtb all assume that the + * divisor is active + */ + reg = readl(AST_IO(AST_BASE_SCU | 0x2c)); + writel(reg | 0x00001000, AST_IO(AST_BASE_SCU | 0x2c)); + + /* + * Disable the watchdogs + */ + writel(0, AST_IO(AST_BASE_WDT | 0x0c)); + writel(0, AST_IO(AST_BASE_WDT | 0x2c)); +} + +static void __init aspeed_map_io(void) +{ + debug_ll_io_init(); + iotable_init(aspeed_io_desc, ARRAY_SIZE(aspeed_io_desc)); +} + +static const char *const aspeed_dt_match[] __initconst = { + "aspeed,ast2400", + "aspeed,ast2500", + NULL, +}; + +DT_MACHINE_START(aspeed_dt, "ASpeed SoC") + .map_io = aspeed_map_io, + .init_early = aspeed_init_early, + .init_machine = aspeed_dt_init, + .dt_compat = aspeed_dt_match, +MACHINE_END