From patchwork Wed May 4 11:40:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Auger Eric X-Patchwork-Id: 67116 Delivered-To: patches@linaro.org Received: by 10.140.92.199 with SMTP id b65csp129559qge; Wed, 4 May 2016 04:40:28 -0700 (PDT) X-Received: by 10.28.29.147 with SMTP id d141mr30719064wmd.91.1462362021188; Wed, 04 May 2016 04:40:21 -0700 (PDT) Return-Path: Received: from mail-wm0-x230.google.com (mail-wm0-x230.google.com. [2a00:1450:400c:c09::230]) by mx.google.com with ESMTPS id t193si4475228wme.78.2016.05.04.04.40.21 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 04 May 2016 04:40:21 -0700 (PDT) Received-SPF: pass (google.com: domain of eric.auger@linaro.org designates 2a00:1450:400c:c09::230 as permitted sender) client-ip=2a00:1450:400c:c09::230; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of eric.auger@linaro.org designates 2a00:1450:400c:c09::230 as permitted sender) smtp.mailfrom=eric.auger@linaro.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: by mail-wm0-x230.google.com with SMTP id e201so183995912wme.0 for ; Wed, 04 May 2016 04:40:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=CgFrfMe7mC0Htp17DFpEyyPbCgNQu2iC7llgxwSiBtE=; b=enfC3Yyi/ti9lKU45c1m+EqNSBzwG2vQJTQWotZixRfEW+Nflz7vVzWjTAtA0vsZjf Zwt3BPLRGiW4hFfUVlCw+Xjrc+93x3WM2/9LTfEJqANuG8GOOd1HFanjhlYtajGvCusF 7RRVxN0CYh+MsGHXn8lyFzSCJ0UFKgWGUpJL0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=CgFrfMe7mC0Htp17DFpEyyPbCgNQu2iC7llgxwSiBtE=; b=SHy6Z+bGV8Ep8uuBNA22j5GaanGSLX98/jlkDr8EpSKOeNKdXhoDGDkbdgidTJwoX8 Wb3Sn2ei/S1KkBV6xRARiCVtE13EDVzPg/DNyr6ee0DPHhTpPnCEP8FF3tJkuRBgPA7I kKJXg/tYSqhHoOQw5ejv/BnZEwhpg/bSeyHh77CJDAjL5kk6pif+DXJwcYq+9WwkOPC5 Q542YVVRaCNE2aMvax4k4fbZlLnYfUuPbTVUrooA+LZ5PB78IJYO/h85HcuOFzdGinUa fRGGgd9cUnt7B7vhuuq3zZqeQ2YaPpGDwfOTpf8EuhYR27jcDkHcOrSG23BYmoi5sXPj lzmQ== X-Gm-Message-State: AOPr4FVgGYfS8UlNPsZ+PX1HKhzhwMkoIsQSTi3o8AemcceV0JUsvgLu03dpONpYTDS7EJZFTg4= X-Received: by 10.195.18.99 with SMTP id gl3mr8127570wjd.162.1462362020906; Wed, 04 May 2016 04:40:20 -0700 (PDT) Return-Path: Received: from new-host-61.home (LMontsouris-657-1-37-90.w80-11.abo.wanadoo.fr. [80.11.198.90]) by smtp.gmail.com with ESMTPSA id u6sm3766963wjh.2.2016.05.04.04.40.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 04 May 2016 04:40:19 -0700 (PDT) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, robin.murphy@arm.com, alex.williamson@redhat.com, will.deacon@arm.com, joro@8bytes.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, christoffer.dall@linaro.org, linux-arm-kernel@lists.infradead.org Cc: patches@linaro.org, linux-kernel@vger.kernel.org, Bharat.Bhushan@freescale.com, pranav.sawargaonkar@gmail.com, p.fedin@samsung.com, iommu@lists.linux-foundation.org, Jean-Philippe.Brucker@arm.com, julien.grall@arm.com, yehuday@marvell.com Subject: [PATCH v9 3/8] iommu: introduce an msi cookie Date: Wed, 4 May 2016 11:40:02 +0000 Message-Id: <1462362007-2753-4-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1462362007-2753-1-git-send-email-eric.auger@linaro.org> References: <1462362007-2753-1-git-send-email-eric.auger@linaro.org> This opaque pointer will enable to store information about msi iommu mappings. Signed-off-by: Eric Auger --- v7 -> v8: remove spinlock and RB tree v5 -> v6: - initialize reserved_binding_list - use a spinlock instead of a mutex --- include/linux/iommu.h | 1 + 1 file changed, 1 insertion(+) -- 1.9.1 diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 021b659..09fba4c 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -90,6 +90,7 @@ struct iommu_domain { struct iommu_domain_geometry geometry; struct iommu_domain_msi_geometry msi_geometry; void *iova_cookie; + void *msi_cookie; }; enum iommu_cap {