From patchwork Fri Aug 19 16:13:13 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Thompson X-Patchwork-Id: 74291 Delivered-To: patches@linaro.org Received: by 10.140.29.52 with SMTP id a49csp391642qga; Fri, 19 Aug 2016 09:13:34 -0700 (PDT) X-Received: by 10.28.130.208 with SMTP id e199mr4558460wmd.14.1471623209210; Fri, 19 Aug 2016 09:13:29 -0700 (PDT) Return-Path: Received: from mail-wm0-x234.google.com (mail-wm0-x234.google.com. [2a00:1450:400c:c09::234]) by mx.google.com with ESMTPS id d13si6928698wjx.137.2016.08.19.09.13.29 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 19 Aug 2016 09:13:29 -0700 (PDT) Received-SPF: pass (google.com: domain of daniel.thompson@linaro.org designates 2a00:1450:400c:c09::234 as permitted sender) client-ip=2a00:1450:400c:c09::234; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of daniel.thompson@linaro.org designates 2a00:1450:400c:c09::234 as permitted sender) smtp.mailfrom=daniel.thompson@linaro.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: by mail-wm0-x234.google.com with SMTP id o80so48186354wme.1 for ; Fri, 19 Aug 2016 09:13:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=fUlwtODZnniMGR+WAHh8OT7DEFcCsi3sdOIrY87+bU0=; b=krYTlXU6MCwm5MYFlX1lHSptTOPhJd1CCEnFifflXjTv8FwFuxT3xQmcd/VbxmUnyB zYrOgZpi70CzP3gdVvBxFmuVlLgaXyGK6Y9af/JEpT4ZTbIq3rE1/9FPq6hTRAiOIyUy yYFJDbr1I4/mWPPnqh3WCyHkDPQdB0LkUhEms= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fUlwtODZnniMGR+WAHh8OT7DEFcCsi3sdOIrY87+bU0=; b=GRYfzwRBHR76/I4D2OEfeneDbEPmy5rusV2/EwPKia2HWtOzTLMYJaED04YJL/twHC wtSCJ+kiqZ0WX52TL8V93g6ZNvXs7USGqCSI9edncvWrDXY8AH1al00g+d+lGArHOqNx E+jtFq9B8swKIV/Cqn2954bNToBLqu4BlyCkzlJkzvmckSEzkTBpQZMQWs+h7Cr3GvmH WlmRe4OcAGM8CHkRQWVPQU+QPjpx4OwrQhIfY/lI2n7fKNetlfWKxKWa0hfm58v9bfnu rWw0KQPZfMdV7h/fR5mTcehRcQg36E7Lp9zqtLfkW27YF7ug53D38qSHnWA6MaxMKr/q nZLg== X-Gm-Message-State: AEkooutAOwITBmtaGCIYmjJ4u4nph0yZcz1pI2Fw0jBic8vJK5AhnNI6oE5qwF1YKlkPio+IjDY= X-Received: by 10.194.120.37 with SMTP id kz5mr7830549wjb.196.1471623208871; Fri, 19 Aug 2016 09:13:28 -0700 (PDT) Return-Path: Received: from wychelm.lan (cpc4-aztw19-0-0-cust71.18-1.cable.virginm.net. [82.33.25.72]) by smtp.gmail.com with ESMTPSA id ub8sm7712636wjc.39.2016.08.19.09.13.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 19 Aug 2016 09:13:28 -0700 (PDT) From: Daniel Thompson To: linux-arm-kernel@lists.infradead.org Cc: Daniel Thompson , Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, patches@linaro.org, linaro-kernel@lists.linaro.org, John Stultz , Sumit Semwal , Marc Zyngier , Dave Martin Subject: [RFC PATCH v3 5/7] arm64: irqflags: Reorder the fiq & async macros Date: Fri, 19 Aug 2016 17:13:13 +0100 Message-Id: <1471623195-7829-6-git-send-email-daniel.thompson@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1471623195-7829-1-git-send-email-daniel.thompson@linaro.org> References: <1471623195-7829-1-git-send-email-daniel.thompson@linaro.org> Separate out the local fiq & async macros from the various arch inlines. This makes is easier for us (in a later patch) to provide an alternative implementation of these inlines. Signed-off-by: Daniel Thompson --- arch/arm64/include/asm/irqflags.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) -- 2.7.4 diff --git a/arch/arm64/include/asm/irqflags.h b/arch/arm64/include/asm/irqflags.h index 8c581281fa12..f367cbd92ff0 100644 --- a/arch/arm64/include/asm/irqflags.h +++ b/arch/arm64/include/asm/irqflags.h @@ -53,12 +53,6 @@ static inline void arch_local_irq_disable(void) : "memory"); } -#define local_fiq_enable() asm("msr daifclr, #1" : : : "memory") -#define local_fiq_disable() asm("msr daifset, #1" : : : "memory") - -#define local_async_enable() asm("msr daifclr, #4" : : : "memory") -#define local_async_disable() asm("msr daifset, #4" : : : "memory") - /* * Save the current interrupt enable state. */ @@ -90,6 +84,12 @@ static inline int arch_irqs_disabled_flags(unsigned long flags) return flags & PSR_I_BIT; } +#define local_fiq_enable() asm("msr daifclr, #1" : : : "memory") +#define local_fiq_disable() asm("msr daifset, #1" : : : "memory") + +#define local_async_enable() asm("msr daifclr, #4" : : : "memory") +#define local_async_disable() asm("msr daifset, #4" : : : "memory") + /* * save and restore debug state */