From patchwork Thu Sep 29 14:22:48 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 4438 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id E75F623EF9 for ; Thu, 29 Sep 2011 14:15:20 +0000 (UTC) Received: from mail-fx0-f52.google.com (mail-fx0-f52.google.com [209.85.161.52]) by fiordland.canonical.com (Postfix) with ESMTP id D3C6BA181A5 for ; Thu, 29 Sep 2011 14:15:20 +0000 (UTC) Received: by fxe23 with SMTP id 23so2582532fxe.11 for ; Thu, 29 Sep 2011 07:15:20 -0700 (PDT) Received: by 10.223.57.17 with SMTP id a17mr1977951fah.65.1317305720605; Thu, 29 Sep 2011 07:15:20 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.3.234 with SMTP id f10cs16138laf; Thu, 29 Sep 2011 07:15:19 -0700 (PDT) Received: by 10.213.29.140 with SMTP id q12mr4078317ebc.89.1317305718650; Thu, 29 Sep 2011 07:15:18 -0700 (PDT) Received: from AM1EHSOBE002.bigfish.com (am1ehsobe002.messaging.microsoft.com. [213.199.154.205]) by mx.google.com with ESMTPS id u33si1389685weq.134.2011.09.29.07.15.18 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 29 Sep 2011 07:15:18 -0700 (PDT) Received-SPF: neutral (google.com: 213.199.154.205 is neither permitted nor denied by best guess record for domain of r65073@freescale.com) client-ip=213.199.154.205; Authentication-Results: mx.google.com; spf=neutral (google.com: 213.199.154.205 is neither permitted nor denied by best guess record for domain of r65073@freescale.com) smtp.mail=r65073@freescale.com Received: from mail105-am1-R.bigfish.com (10.3.201.240) by AM1EHSOBE002.bigfish.com (10.3.204.22) with Microsoft SMTP Server id 14.1.225.22; Thu, 29 Sep 2011 14:15:17 +0000 Received: from mail105-am1 (localhost.localdomain [127.0.0.1]) by mail105-am1-R.bigfish.com (Postfix) with ESMTP id 7D79D179053D; Thu, 29 Sep 2011 14:15:17 +0000 (UTC) X-SpamScore: -9 X-BigFish: VS-9(zz1432N98dKzz1202hzz8275dhz2dh2a8h668h839h944h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail105-am1 (localhost.localdomain [127.0.0.1]) by mail105-am1 (MessageSwitch) id 1317305715697341_22250; Thu, 29 Sep 2011 14:15:15 +0000 (UTC) Received: from AM1EHSMHS002.bigfish.com (unknown [10.3.201.247]) by mail105-am1.bigfish.com (Postfix) with ESMTP id A0BAD12C0053; Thu, 29 Sep 2011 14:15:15 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by AM1EHSMHS002.bigfish.com (10.3.207.102) with Microsoft SMTP Server (TLS) id 14.1.225.22; Thu, 29 Sep 2011 14:12:48 +0000 Received: from az33smr02.freescale.net (10.64.34.200) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server id 14.1.323.7; Thu, 29 Sep 2011 09:12:47 -0500 Received: from S2100-06.ap.freescale.net (S2100-06.ap.freescale.net [10.192.242.125]) by az33smr02.freescale.net (8.13.1/8.13.0) with ESMTP id p8TECiWM028548; Thu, 29 Sep 2011 09:12:45 -0500 (CDT) Date: Thu, 29 Sep 2011 22:22:48 +0800 From: Shawn Guo To: Sascha Hauer CC: Shawn Guo , , Subject: Re: [PATCH 4/6] arm/imx: remove cpu_is_xxx() from arch_idle() Message-ID: <20110929142247.GL19318@S2100-06.ap.freescale.net> References: <1317201368-6403-1-git-send-email-shawn.guo@linaro.org> <1317201368-6403-5-git-send-email-shawn.guo@linaro.org> <20110929085936.GD31404@pengutronix.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20110929085936.GD31404@pengutronix.de> User-Agent: Mutt/1.5.21 (2010-09-15) X-OriginatorOrg: freescale.com On Thu, Sep 29, 2011 at 10:59:36AM +0200, Sascha Hauer wrote: > On Wed, Sep 28, 2011 at 05:16:06PM +0800, Shawn Guo wrote: > > This patch adds an idle hook imx_idle to be called in arch_idle(). > > Any soc that needs a customized idle implementation other than > > cpu_do_idle() can set up this hook in soc specific call. > > > > Signed-off-by: Shawn Guo > > --- > > arch/arm/mach-imx/mm-imx3.c | 30 ++++++++++++++++++++++++++ > > arch/arm/mach-mx5/mm.c | 6 +++++ > > arch/arm/mach-mx5/pm-imx5.c | 3 +- > > arch/arm/plat-mxc/include/mach/common.h | 2 + > > arch/arm/plat-mxc/include/mach/system.h | 35 ++---------------------------- > > arch/arm/plat-mxc/system.c | 2 + > > 6 files changed, 45 insertions(+), 33 deletions(-) > > > > I had to fold the following into this commit, otherwise we end > up with: > > In file included from arch/arm/mach-mx5/pm-imx5.c:17:0:arch/arm/plat-mxc/include/mach/common.h:77:33: warning: 'enum mxc_cpu_pwr_mode' declared inside parameter list > arch/arm/plat-mxc/include/mach/common.h:77:33: warning: its scope is only this definition or declaration, which is probably not what you want > Aha, I based this series off imx6q one. I have the following change in patch 'arm/imx6q: add suspend/resume support'. But I'm fine with your changes below. > Sascha > > diff --git a/arch/arm/mach-mx5/system.c b/arch/arm/mach-mx5/system.c > index 76ae8dc..144ebeb 100644 > --- a/arch/arm/mach-mx5/system.c > +++ b/arch/arm/mach-mx5/system.c > @@ -13,6 +13,7 @@ > #include > #include > #include > +#include > #include "crm_regs.h" > > /* set cpu low power mode before WFI instruction. This function is called > diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h > index 2b298d8..afaa967 100644 > --- a/arch/arm/plat-mxc/include/mach/common.h > +++ b/arch/arm/plat-mxc/include/mach/common.h > @@ -72,6 +72,15 @@ extern void mxc_arch_reset_init(void __iomem *); > extern void mx51_efikamx_reset(void); > extern int mx53_revision(void); > extern int mx53_display_revision(void); > + > +enum mxc_cpu_pwr_mode { > + WAIT_CLOCKED, /* wfi only */ > + WAIT_UNCLOCKED, /* WAIT */ > + WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */ > + STOP_POWER_ON, /* just STOP */ > + STOP_POWER_OFF, /* STOP + SRPG */ > +}; > + > extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode); > extern void (*imx_idle)(void); > #endif > diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h > index 0987923..00a7819 100644 > --- a/arch/arm/plat-mxc/include/mach/mxc.h > +++ b/arch/arm/plat-mxc/include/mach/mxc.h > @@ -183,13 +183,6 @@ struct cpu_op { > }; > > int tzic_enable_wake(int is_idle); > -enum mxc_cpu_pwr_mode { > - WAIT_CLOCKED, /* wfi only */ > - WAIT_UNCLOCKED, /* WAIT */ > - WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */ > - STOP_POWER_ON, /* just STOP */ > - STOP_POWER_OFF, /* STOP + SRPG */ > -}; > > extern struct cpu_op *(*get_cpu_op)(int *op); > #endif > -- > Pengutronix e.K. | | > Industrial Linux Solutions | http://www.pengutronix.de/ | > Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | > Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 571e91d..318b995 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -13,6 +13,7 @@ struct platform_device; struct clk; +enum mxc_cpu_pwr_mode; extern void mx1_map_io(void); extern void mx21_map_io(void);