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[2001:1868:205::9]) by mx.google.com with ESMTPS id aa10si2715597pac.115.2015.05.07.06.02.12 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 May 2015 06:02:13 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YqLPR-0000VL-5x; Thu, 07 May 2015 13:00:13 +0000 Received: from mail-pa0-f41.google.com ([209.85.220.41]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YqLPL-0007vd-7J for linux-arm-kernel@lists.infradead.org; Thu, 07 May 2015 13:00:07 +0000 Received: by pabtp1 with SMTP id tp1so39674087pab.2 for ; Thu, 07 May 2015 05:59:45 -0700 (PDT) X-Received: by 10.68.139.131 with SMTP id qy3mr6841903pbb.146.1431003585745; Thu, 07 May 2015 05:59:45 -0700 (PDT) Received: from dragon ([107.6.117.179]) by mx.google.com with ESMTPSA id to6sm2159108pbc.19.2015.05.07.05.59.42 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 07 May 2015 05:59:45 -0700 (PDT) Date: Thu, 7 May 2015 20:59:03 +0800 From: Shawn Guo To: Shenwei Wang Subject: Re: [PATCH 1/1] ARM: imx: Correct the comments in time.c Message-ID: <20150507125858.GH3162@dragon> References: <1430343627-60688-1-git-send-email-shenwei.wang@freescale.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1430343627-60688-1-git-send-email-shenwei.wang@freescale.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150507_060007_322648_206FB74D X-CRM114-Status: GOOD ( 17.38 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.41 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.220.41 listed in wl.mailspike.net] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders Cc: linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: shawn.guo@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.178 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 On Wed, Apr 29, 2015 at 04:40:27PM -0500, Shenwei Wang wrote: > The comments were corrected as the following to reflect > the real situation of Freescale MXC timer IP block. > There are totally 4 version of the timer on Freescale i.MX SoCs. > > Signed-off-by: Shenwei Wang > --- > arch/arm/mach-imx/time.c | 8 +++++--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c > index acb1ff5..b1698e1 100644 > --- a/arch/arm/mach-imx/time.c > +++ b/arch/arm/mach-imx/time.c > @@ -38,9 +38,11 @@ > #include "hardware.h" > > /* > - * There are 2 versions of the timer hardware on Freescale MXC hardware. > - * Version 1: MX1/MXL, MX21, MX27. > - * Version 2: MX25, MX31, MX35, MX37, MX51 > + * There are 4 versions of the timer hardware on Freescale MXC hardware. > + * Version 0: MX1/MXL > + * Version 1: MX21, MX27. > + * Version 2: MX25, MX31, MX35, MX37, MX51, MX6Q(rev1.0) > + * Version 3: MX6DL, MX6SX, MX6Q(rev1.1+) This is the problem with version numbers. Version numbers defined by software are too arbitrary and could conflict with the ones defined by IP design (i.e. IPUv3) some day. Just for example, if some day GPTv2 IP comes with some significant design changes, "v2" will becomes a source of confusion between software and hardware. It's even worse if we already defined fsl,gpt-v2 as the device tree compatible. That's why we can only use the version number defined by hardware in device tree binding. If no hardware version is given, the best bet would be use SoC name in the bindings to specify the particular programming model of the IP block. I applied patch to drop the version numbers as below. Shawn diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c index acb1ff577cda..ab5ee1c445f3 100644 --- a/arch/arm/mach-imx/time.c +++ b/arch/arm/mach-imx/time.c @@ -38,9 +38,11 @@ #include "hardware.h" /* - * There are 2 versions of the timer hardware on Freescale MXC hardware. - * Version 1: MX1/MXL, MX21, MX27. - * Version 2: MX25, MX31, MX35, MX37, MX51 + * There are 4 versions of the timer hardware on Freescale MXC hardware. + * - MX1/MXL + * - MX21, MX27. + * - MX25, MX31, MX35, MX37, MX51, MX6Q(rev1.0) + * - MX6DL, MX6SX, MX6Q(rev1.1+) */ /* defines common for all i.MX */