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[2001:1868:205::9]) by mx.google.com with ESMTPS id dd8si25510954pdb.98.2015.04.19.14.55.34 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 19 Apr 2015 14:55:36 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yjx8v-0006nO-DK; Sun, 19 Apr 2015 21:52:45 +0000 Received: from mail-ig0-f179.google.com ([209.85.213.179]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yjx8q-0006jH-Fc for linux-arm-kernel@lists.infradead.org; Sun, 19 Apr 2015 21:52:41 +0000 Received: by igbhj9 with SMTP id hj9so46990344igb.1 for ; Sun, 19 Apr 2015 14:52:17 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.43.6.65 with SMTP id oj1mr14797393icb.75.1429480337113; Sun, 19 Apr 2015 14:52:17 -0700 (PDT) Received: by 10.36.125.5 with HTTP; Sun, 19 Apr 2015 14:52:17 -0700 (PDT) In-Reply-To: <20150419192836.GO12732@n2100.arm.linux.org.uk> References: <1426248452-4773-1-git-send-email-ard.biesheuvel@linaro.org> <1426248452-4773-2-git-send-email-ard.biesheuvel@linaro.org> <20150419170819.GN12732@n2100.arm.linux.org.uk> <6D2381CE-C6EB-4B18-972D-DA07FD77C2D4@linaro.org> <20150419192836.GO12732@n2100.arm.linux.org.uk> Date: Sun, 19 Apr 2015 23:52:17 +0200 Message-ID: Subject: Re: [PATCH v2 1/8] ARM: replace PROCINFO embedded branch with relative offset From: Ard Biesheuvel To: Russell King - ARM Linux X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150419_145240_573132_1591A30E X-CRM114-Status: GOOD ( 17.59 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.213.179 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.213.179 listed in wl.mailspike.net] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders Cc: Joachim Eastwood , Arnd Bergmann , "linux-arm-kernel@lists.infradead.org" , "nico@linaro.org" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ard.biesheuvel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.52 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 On 19 April 2015 at 21:28, Russell King - ARM Linux wrote: > On Sun, Apr 19, 2015 at 07:41:08PM +0200, Ard Biesheuvel wrote: >> I am away from my work pc so i can't check but i wonder if all setup >> functions are correctly annotated as thumb2 when built in thumb2 mode. >> If not, it would explain why a plain branch works but doing arithmetic >> on the address doesn't. > > Yes, it's a Thumb2 kernel, but more importantly, it's a nommu kernel, > and the nommu code wasn't touched. > Ah, my bad. I had no idea that code was duplicated elsewhere, but I guess grepping for PROCINFO_INITFUNC would have given me a strong hint. > So, the entry code looks like this: > > 28008000: f8df 9024 ldr.w r9, [pc, #36] ; 28008028 <__after_proc_init+0x4> > 28008004: f8d9 9000 ldr.w r9, [r9] > 28008008: f001 f926 bl 28009258 <__lookup_processor_type> > 2800800c: ea5f 0a05 movs.w sl, r5 > 28008010: f001 8164 beq.w 280092dc <__error_p> > 28008014: f8df d014 ldr.w sp, [pc, #20] ; 2800802c <__after_proc_init+0x8> > 28008018: f20f 0e07 addw lr, pc, #7 > 2800801c: f10a 0c10 add.w ip, sl, #16 > 28008020: 46e7 mov pc, ip OK, there's still a dodgy bit here. The issue I pointed out in my previous email actually does exist, i.e., the setup functions are not always annotated as thumb2 so the offset from the base of the struct may lack the thumb bit even if the function is coded in thumb2. This is caused by the fact that local labels lack this annotation, even if the function is emitted into a separate section in the same object file and references to it are resolved by the linker through relocations. Looking at a couple of procinfo entries from proc-v7.S, it turns out that the offset field (the 1st word on the 2nd line) indeed contains even values in some cases in a Thumb2 kernel c0771364 <__v7_ca9mp_proc_info>: c0771364: 410fc090 ff0ffff0 00011c0e 00000c02 ...A............ c0771374: ffaab634 c0773934 c077393a 00008097 4...49w.:9w..... ... c0771398 <__v7_ca8_proc_info>: c0771398: 410fc080 ff0ffff0 00011c0e 00000c02 ...A............ c07713a8: ffaab667 c0773934 c077393a 00008097 g...49w.:9w..... ... c07713cc <__v7_pj4b_proc_info>: c07713cc: 560f5800 ff0fff00 00011c0e 00000c02 .X.V............ c07713dc: ffaab5ee c0773934 c077393a 00008097 ....49w.:9w..... ... c0771400 <__v7_cr7mp_proc_info>: c0771400: 410fc170 ff0ffff0 00011c0e 00000c02 p..A............ c0771410: ffaab598 c0773934 c077393a 00008097 ....49w.:9w..... ... c0771434 <__v7_ca7mp_proc_info>: c0771434: 410fc070 ff0ffff0 00011c0e 00000c02 p..A............ c0771444: ffaab56a c0773934 c077393a 00008097 j...49w.:9w..... ... but we are getting lucky because the 'ret r12' instruction from head{-nommu}.S is emitted as 'mov pc, ip', which is a [for v7] deprecated method of performing a branch-to-register which doesn't incur a mode switch. In other words, if we'd use the architecturally correct 'bx ip' here, the code breaks. As far as I can tell, there are no such setup functions that could run on a Thumb2 capable CPU but are emitted in ARM code explicitly, so I think the fix could be as simple as diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S index c671f345266a..a4f6d74e9e21 100644 --- a/arch/arm/mm/proc-macros.S +++ b/arch/arm/mm/proc-macros.S @@ -333,7 +333,7 @@ ENTRY(\name\()_tlb_fns) .endm .macro initfn, func, base - .long \func - \base + .long BSYM(\func) - \base .endm /*