From patchwork Wed May 27 12:24:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sivaprakash Murugesan X-Patchwork-Id: 188958 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9336EC433E0 for ; Wed, 27 May 2020 12:25:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7884E20873 for ; Wed, 27 May 2020 12:25:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729407AbgE0MZC (ORCPT ); Wed, 27 May 2020 08:25:02 -0400 Received: from alexa-out-sd-01.qualcomm.com ([199.106.114.38]:38005 "EHLO alexa-out-sd-01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726267AbgE0MZB (ORCPT ); Wed, 27 May 2020 08:25:01 -0400 Received: from unknown (HELO ironmsg03-sd.qualcomm.com) ([10.53.140.143]) by alexa-out-sd-01.qualcomm.com with ESMTP; 27 May 2020 05:25:00 -0700 Received: from sivaprak-linux.qualcomm.com ([10.201.3.202]) by ironmsg03-sd.qualcomm.com with ESMTP; 27 May 2020 05:24:57 -0700 Received: by sivaprak-linux.qualcomm.com (Postfix, from userid 459349) id 21E4621800; Wed, 27 May 2020 17:54:56 +0530 (IST) From: Sivaprakash Murugesan To: agross@kernel.org, bjorn.andersson@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Sivaprakash Murugesan Subject: [PATCH V6 0/5] Add APSS clock controller support for IPQ6018 Date: Wed, 27 May 2020 17:54:47 +0530 Message-Id: <1590582292-13314-1-git-send-email-sivaprak@codeaurora.org> X-Mailer: git-send-email 2.7.4 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The CPU on Qualcomm's IPQ6018 devices are primarily fed by APSS PLL and XO, these are connected to a clock mux and enable block. This patch series adds support for these clocks and inturn enables clocks required for CPU freq. [V6] * Split mailbox driver from this series, mailbox changes will sent as a separate series * Addressed review comments from Stephen [V5] * Addressed Bjorn comments on apss clk and dt-bindings * Patch 2 depends on a53 pll dt-bindings https://www.spinics.net/lists/linux-clk/msg48358.html [V4] * Re-written PLL found on IPQ platforms as a separate driver * Addressed stephen's comments on apss clock controller and pll * Addressed Rob's review comments on bindings * moved a53 pll binding from this series as it is not applicable, will send it separately. [V3] * Fixed dt binding check error in patch2 dt-bindings: clock: Add YAML schemas for QCOM A53 PLL [V2] * Restructred the patch series as there are two different HW blocks, the mux and enable belongs to the apcs block and PLL has a separate HW block. * Converted qcom mailbox and qcom a53 pll documentation to yaml. * Addressed review comments from Stephen, Rob and Sibi where it is applicable. * Changed this cover letter to state the purpose of this patch series Sivaprakash Murugesan (5): dt-bindings: clock: add ipq6018 a53 pll compatible clk: qcom: Add ipq apss pll driver clk: qcom: Add DT bindings for ipq6018 apss clock controller clk: qcom: Add ipq6018 apss clock controller arm64: dts: ipq6018: Add support for apss pll .../devicetree/bindings/clock/qcom,a53pll.yaml | 18 ++++ arch/arm64/boot/dts/qcom/ipq6018.dtsi | 8 ++ drivers/clk/qcom/Kconfig | 19 ++++ drivers/clk/qcom/Makefile | 2 + drivers/clk/qcom/apss-ipq-pll.c | 95 ++++++++++++++++++ drivers/clk/qcom/apss-ipq6018.c | 106 +++++++++++++++++++++ include/dt-bindings/clock/qcom,apss-ipq.h | 12 +++ 7 files changed, 260 insertions(+) create mode 100644 drivers/clk/qcom/apss-ipq-pll.c create mode 100644 drivers/clk/qcom/apss-ipq6018.c create mode 100644 include/dt-bindings/clock/qcom,apss-ipq.h Acked-by: Rob Herring